Texas Instruments MSP430x1xx manual SPI Enable, Transmit Enable

USART Operation: SPI Mode

14.2.4 SPI Enable

The SPI transmit/receive enable bit USPIEx enables or disables the USART in SPI mode. When USPIEx = 0, the USART stops operation after the current transfer completes, or immediately if no operation is active. A PUC or set SWRST bit disables the USART immediately and any active transfer is terminated.

Transmit Enable

When USPIEx = 0, any further write to UxTXBUF does not transmit. Data written to UxTXBUF will begin to transmit when USPIEx = 1 and the BRCLK source is active. Figure 14−4 and Figure 14−5 show the transmit enable state diagrams.

Figure 14−4. Master Mode Transmit Enable

USPIEx = 0		No Data Written	Not Completed
		to Transfer Buffer
		USPIEx = 1,
USPIEx = 1	Idle State	Data Written to
		Transmit Buffer
Transmit			Transmission	Handle Interrupt
	(Transmitter
Disable			Active	Conditions
	Enabled)
USPIEx = 0
				Character
SWRST		USPIEx = 1		Transmitted

PUC

USPIEx = 0 And Last Buffer

Entry Is Transmitted

Figure 14−5. Slave Transmit Enable State Diagram

USPIEx = 0		No Clock at UCLK	Not Completed
USPIEx = 1	Idle State	USPIEx = 1
Transmit			Transmission	Handle Interrupt
	(Transmitter
Disable			Active	Conditions
	Enabled)	External Clock
USPIEx = 0
		Present
				Character
SWRST		USPIEx = 1		Transmitted

PUC

USPIEx = 0

USART Peripheral Interface, SPI Mode 14-7