![(CnMISCEN)](/images/new-backgrounds/123238/123238125x1.webp)
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3.7EMAC Control Module Interrupt Core Miscellaneous Interrupt Enable Registers
The EMAC control module interrupt core
Figure 18. EMAC Control Module Interrupt Core
(CnMISCEN)
31 |
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| 16 |
| Reserved |
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15 | 4 | 3 | 2 | 1 | 0 | |
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Reserved |
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| STATPENDEN | HOSTPENDEN | LINKINT0EN | USERINT0EN |
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LEGEND: R/W = Read/Write; R = Read only;
Table 15. EMAC Control Module Interrupt Core
(CnMISCEN)
Bit | Field | Value | Description |
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Reserved | 0 | Reserved | |
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3 | STATPENDEN |
| Enable CnMISCPULSE interrupt generation when EMAC statistics interrupts are generated |
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| 0 | CnMISCPULSE generation is disabled for EMAC STATPEND interrupts. |
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| 1 | CnMISCPULSE generation is enabled for EMAC STATPEND interrupts. |
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2 | HOSTPENDEN |
| Enable CnMISCPULSE interrupt generation when EMAC host interrupts are generated |
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| 0 | CnMISCPULSE generation is disabled for EMAC HOSTPEND interrupts. |
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| 1 | CnMISCPULSE generation is enabled for EMAC HOSTPEND interrupts. |
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1 | LINKINT0EN |
| Enable CnMISCPULSE interrupt generation when MDIO LINKINT0 interrupts (corresponding to |
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| USERPHYSEL0) are generated |
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| 0 | CnMISCPULSE generation is disabled for MDIO LINKINT0 interrupts. |
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| 1 | CnMISCPULSE generation is enabled for MDIO LINKINT0 interrupts. |
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0 | USERINT0EN |
| Enable CnMISCPULSE interrupt generation when MDIO USERINT0 interrupts (corresponding |
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| to USERACCESS0) are generated |
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| 0 | CnMISCPULSE generation is disabled for MDIO USERINT0. |
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| 1 | CnMISCPULSE generation is enabled for MDIO USERINT0. |
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SPRUFL5B | EMAC/MDIO Module | 63 |
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