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5.6Receive Teardown Register (RXTEARDOWN)
The receive teardown register (RXTEARDOWN) is shown in Figure 44 and described in Table 43.
Figure 44. Receive Teardown Register (RXTEARDOWN)
31 |
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| 16 |
| Reserved |
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15 | 3 | 2 | 0 |
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Reserved |
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| RXTDNCH |
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LEGEND: R/W = Read/Write; R = Read only;
Table 43. Receive Teardown Register (RXTEARDOWN) Field Descriptions
Bit | Field | Value | Description |
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Reserved | 0 | Reserved | |
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RXTDNCH | Receive teardown channel. The receive channel teardown is commanded by writing the encoded value | ||
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| of the receive channel to be torn down. The teardown register is read as 0. |
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| 0 | Teardown receive channel 0 |
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| 1h | Teardown receive channel 1 |
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| 2h | Teardown receive channel 2 |
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| 3h | Teardown receive channel 3 |
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| 4h | Teardown receive channel 4 |
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| 5h | Teardown receive channel 5 |
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| 6h | Teardown receive channel 6 |
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| 7h | Teardown receive channel 7 |
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SPRUFL5B | EMAC/MDIO Module | 89 |
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