![5.11 MAC Input Vector Register (MACINVECTOR)](/images/new-backgrounds/123238/123238187x1.webp)
EMAC Module Registers | www.ti.com |
5.11 MAC Input Vector Register (MACINVECTOR)
The MAC input vector register (MACINVECTOR) is shown in Figure 49 and described in Table 48.
Figure 49. MAC Input Vector Register (MACINVECTOR)
31 | 28 | 27 | 26 | 25 | 24 | 23 | 16 |
| Reserved | STATPEND | HOSTPEND | LINKINT0 | USERINT0 |
| TXPEND |
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15 |
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| 8 | 7 | 0 |
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| RXTHRESHPEND |
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| RXPEND | |
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LEGEND: R = Read only;
Table 48. MAC Input Vector Register (MACINVECTOR) Field Descriptions
Bit | Field | Value | Description |
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Reserved | 0 | Reserved | |
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27 | STATPEND | EMAC module statistics interrupt (STATPEND) pending status bit | |
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26 | HOSTPEND | EMAC module host error interrupt (HOSTPEND) pending status bit | |
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25 | LINKINT0 | MDIO module USERPHYSEL0 (LINKINT0) status bit | |
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24 | USERINT0 | MDIO module USERACCESS0 (USERINT0) status bit | |
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TXPEND | Transmit channels | ||
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RXTHRESHPEND | Receive channels | ||
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| RX0THRESHPEND. |
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RXPEND | Receive channels | ||
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94 | EMAC/MDIO Module | SPRUFL5B |
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