Texas Instruments TMS320DM643x PLL Controller Registers, 3. PLL and Reset Controller List, Size

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PLL Controller Registers

5.4PLL Controller Registers

Table 5-3lists the base address and end address for the PLL controllers. Table 5-4lists the memory-mapped registers for the PLL and reset controller. See the device-specific data manual for the memory address of these registers.

Table 5-3. PLL and Reset Controller List

PLL and Reset Controller	Base Address		End Address	Size
PLLC1	1C4	0800h	1C4 0BFFh	400h
PLLC2	1C4	0C00h	1C4 0FFFh	400h

Table 5-4. PLL and Reset Controller Registers

Offset	Acronym	Register Description	Section
00h	PID	Peripheral ID Register	Section 5.4.1
E4h	RSTYPE(1)	Reset Type Status Register	Section 5.4.2
100h	PLLCTL	PLL Control Register	Section 5.4.3
110h	PLLM	PLL Multiplier Control Register	Section 5.4.4
118h	PLLDIV1	PLL Controller Divider 1 Register (SYSCLK1)	Section 5.4.5
11Ch	PLLDIV2	PLL Controller Divider 2 Register (SYSCLK2)	Section 5.4.6
120h	PLLDIV3(1)	PLL Controller Divider 3 Register (SYSCLK3)	Section 5.4.7
124h	OSCDIV1(1)	Oscillator Divider 1 Register (OBSCLK)	Section 5.4.8
12Ch	BPDIV	Bypass Divider Register	Section 5.4.9
138h	PLLCMD	PLL Controller Command Register	Section 5.4.10
13Ch	PLLSTAT	PLL Controller Status Register	Section 5.4.11
140h	ALNCTL	PLL Controller Clock Align Control Register	Section 5.4.12
144h	DCHANGE	PLLDIV Ratio Change Status Register	Section 5.4.13
148h	CKEN(1)	Clock Enable Control Register	Section 5.4.14
14Ch	CKSTAT	Clock Status Register	Section 5.4.15
150h	SYSTAT	SYSCLK Status Register	Section 5.4.16

(1)not supported for PLL2.

48	PLL Controller	SPRU978E–March 2008
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