Texas Instruments TMS320DM643x manual IcePick Emulation Support in the PSC, PSC Interrupts

Models: TMS320DM643x

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6.5IcePick Emulation Support in the PSC

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IcePick Emulation Support in the PSC

6.5IcePick Emulation Support in the PSC

The PSC supports IcePick commands that allow IcePick aware emulation tools to have some control over the state of power domains and modules. On the DM643x DMP, this IcePick support only applies to the C64x+ CPU (module number 39 in the AlwaysOn power domain 0).

In particular, Table 6-3shows IcePick emulation commands recognized by the PSC, and indicated ones that apply to the C64x+ CPU on the DM643x DMP.

Table 6-3. IcePick Emulation Commands

Power On and

 

 

 

Enable Features

Power On and Enable Descriptions

Reset Features

Reset Descriptions

Inhibit Sleep

Allows emulation to prevent software from

Assert Reset

Allows emulation to assert the

 

transitioning the module out of the enable state.

 

module’s local reset. Applicable

 

Applicable to the DM643x DMP.

 

to the DM643x DMP.

Force Power

Allows emulation to force the power domain into

Wait Reset

Allows emulation to keep local

 

an on state. Not applicable on the DM643x DMP

 

reset asserted for an extended

 

as AlwaysOn power domain is always on.

 

period of time after software

 

 

 

initiates local reset de-assert.

 

 

 

Applicable to the DM643x DMP.

Force Active

Allows emulation to force the module into the

Block Reset

Allows emulation to block

 

enable state. Applicable to the DM643x DMP.

 

software initiated local and

 

 

 

module resets. Applicable to the

 

 

 

DM643x DMP.

Note: When emulation tools remove the above commands, the PSC immediately executes a state transition based on the current values in the NEXT bit in PDCTL0 and the NEXT bit in MDCTLn, as set by software.

6.6PSC Interrupts

The PSC has an interrupt that is tied to the C64x+ interrupt controller (INTC). This interrupt is named PSCINT in the interrupt map. The PSC interrupt is generated when certain IcePick emulation events occur.

6.6.1 Interrupt Events

The PSC interrupt is generated when any of the following events occur:

Module State Emulation Event

Module Local Reset Emulation Event

These interrupt events are summarized in Table 6-4and described in more detail in this section.

 

 

Table 6-4. PSC Interrupt Events

Interrupt Enable Bits

 

Control Register

Status Bit

Interrupt Condition

MDCTLn

EMUIHB

Interrupt occurs when the emulation alters the module state.

MDCTLn

EMURST

Interrupt occurs when the emulation alters the module's local reset.

The PSC interrupt events only apply when IcePick emulation alters the state of the module from the user-programmed state in the NEXT bit in MDCTLn. As discussed in Section 6.5, on the DM643x DMP, IcePick support only applies to the C64x+ CPU (module 39), therefore the PSC interrupt condition only applies to module 39.

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Power and Sleep Controller

SPRU978E–March 2008

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Texas Instruments TMS320DM643x manual IcePick Emulation Support in the PSC, PSC Interrupts, Interrupt Events