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Overview
9.1Overview
The TMS320DM643x DMP System Module is a
∙Device Identification
∙Device Configuration
–Pin multiplexing control
–Device boot configuration status
∙Power Management
–VDD 3.3 V I/O
∙Special Peripheral Status and Control
–Timer control
–VPSS clock and DAC control
–DDR2 VTP control
–HPI control
∙Bandwidth Management
–Bus master DMA priority control
–EDMA Transfer Channel configuration
∙Boot Control
This chapter describes the System Module.
9.2Device Identification
The DEVICE_ID register of the System Module contains a software readable version of the JTAG ID device. Software can use this register to determine the version of the device on which it is executing. The register format and description are shown in the
9.3Device Configuration
The System Module contains registers for controlling pin multiplexing and registers that reflect the boot configuration status.
9.3.1 Pin Multiplexing Control
The DM643x DMP makes extensive use of pin multiplexing to accommodate the large number of peripheral functions in the smallest possible package. A combination of hardware configuration (configuration pins latched at device reset) and register program control (PINMUX0 and PINMUX1 registers) controls pin multiplexing to accomplish this. Hardware does not attempt to ensure that the proper pin multiplexing is selected for the peripherals or that interface mode is being used.
Detailed information about the pin multiplexing and control is covered in the
9.3.2 Device Boot Configuration Status
The device boot and configuration settings are latched at device reset (POR or RESET), and captured in the BOOTCFG register. See the
86 | System Module |
