Texas Instruments TMS320DM643x Local Reset, Executing State Transitions, Module State Transitions

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Executing State Transitions

6.3.3 Local Reset

In addition to module reset (described in Section 6.3.2), the DSP CPU can be reset using a special local reset. When DSP local reset is asserted, the DSPs internal memories (L1P, L1D, and L2) are still accessible. The local reset only resets the DSP CPU core, not the rest of the DSP subsystem, as the DSP module reset would.

Module reset takes precedence over Local Reset; therefore, Local Reset is not useful when the DSP is in SyncReset or SwRstDisable state.

See Chapter 10 for more information on local reset and scenarios where this can be used.

The procedures for asserting and de-asserting DSP local reset are as follows:

1.Clear the LRST bit in MDCTL39 to 0 (assert the DSP local reset).

2.Set the LRST bit in MDCTL39 to 1 (de-assert DSP local reset). If the DSP is in the enable state, it immediately executes program instructions after reset is de-asserted.

6.4Executing State Transitions

This section describes how to execute state transitions for device modules.

6.4.1 Power Domain State Transitions

The DM643x DMP consists of only one power domain--the AlwaysOn power domain. This AlwaysOn Power Domain is always in the ON state when the chip is powered-on. You are not allowed to change this power domain state to OFF.

6.4.2 Module State Transitions

This section describes the procedure for transitioning the module state. All DM643x DMP modules are on the AlwaysOn domain (Power Domain 0).

Note that some peripherals have special programming requirements and steps you must take before you can invoke the PSC module state transition. Refer to the individual peripheral reference guide for more details. For example, the DDR2 memory controller requires that you first place the DDR memory in self-refresh mode before you invoke the PSC module state transition, if you want to maintain the memory content.

Note: The following procedure is directly applicable for all modules, except for the DSP in the DM643x DMP. To transition the DSP module state, you must be aware of several system considerations.

The procedure for module state transitions is as follows (where n corresponds to the module):

1.Wait for the GOSTAT[0] bit in PTSTAT to clear to 0. You must wait for any previously initiated transitions to finish before initiating a new transition.

2.Set the NEXT bit in MDCTLn to SwRstDisable (0), SyncReset (1), Disable (2h), or Enable (3h).

Note: You may set transitions in multiple NEXT bits in MDCTLn in this step. Transitions do not actually take place until you set the GO[0] bit in PTCMD in a later step.

3.Set the GO[0] bit in PTCMD to 1 to initiate the transition(s).

4.Wait for the GOSTAT[0] bit in PTSTAT to clear to 0. The modules are safely in the new states only after the GOSTAT[0] bit in PTSTAT is cleared to 0.

SPRU978E–March 2008 Power and Sleep Controller 65

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