Agilent Technologies 01664-97005 instruction

Testing Performance

To test the multiple-clock, multiple-edge, state acquisition

11Press the blue shift key, then press the Run key. If 2 - 4 acquisitions are obtained without the "Stop Condition Satisfied" message appearing, then the test passes. Press Stop to halt the acquisition. Record the Pass or Fail results in the performance test record.

12Test the next setup/hold combination.

a In the logic analyzer Format menu, select Master Clock. b Turn off and disconnect the clocks just tested.

c Repeat steps 1 through 12 for the next setup/hold combination listed in step 1 on page 3-40, until all listed setup/hold combinations have been tested.

When aligning the data and clock waveforms using the oscilloscope, align the waveforms according to the setup time of the setup/hold combination being tested, +0.0 ps or −100 ps.

hen continue through the complete test.

3–44

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Agilent Technologies 01664-97005 manual Hen continue through the complete test

Contents

Agilent Technologies 1664A Logic Analyzer Agilent Technologies 1664A Logic Analyzer Agilent Technologies 1664A Logic Analyzer This Book Table of Contents To adjust the CRT intensity ContentsTo test the time interval accuracy Self-Tests Description Gpib Optional RS-232COptional Centronix Viii General Information Accessories Available AccessoriesAccessories Supplied Part Number Qty Accessories Available Part Number Specifications State Analysis Supplemental CharacteristicsProbes Timing Analysis Measurement Functions IndicatorsMeasurement and Display Functions Data Entry/Display Marker Functions Auxiliary PowerDimensions Operating Environment Product Regulations EMC Recommended Test Equipment Recommended Test EquipmentEquipment Required Preparing for Use Inspect the shipping container for damage Check the supplied accessoriesTo inspect the logic analyzer Inspect the product for physical damage Ferrites Ferrites To operate the user interface To apply powerTo apply power To set the line voltage To test the logic analyzer To clean the logic analyzerTo degauss the display To degauss the displayPage Testing Performance Testing Performance To perform the self-tests Select the Front Panel Test To perform the self-tests Select the Display Test To make the test connectors Materials Required To make the test connectors Set up the equipment To test the threshold accuracy Set up the logic analyzer Connect the logic analyzerTo test the threshold accuracy Test the TTL threshold To test the threshold accuracy Test the ECL threshold Test the − User threshold Test the + User threshold Test the 0 V User threshold Test the next pod Set up the pulse generator Pulse Generator SetupTo test the glitch capture Set up the oscilloscope Oscilloscope SetupTo test the glitch capture Connect the Logic Analyzer to the Pulse Generator Test the glitch capture on the connected channels Set up the Waveform menu to view all the channels Test the next channels To test the single-clock, single-edge, state acquisition To test the single-clock, single-edge, state acquisition Set up the Format menu Set up the Trigger menu Connect the 1664A Logic Analyzer to the Pulse Generator Verify the test signal To test the single-clock, single-edge, state acquisition Check the setup/hold combination Select the logic analyzer setup/hold timeSetup/Hold Combinations Select the clock to be tested Clocks To test the single-clock, single-edge, state acquisition Select the clock to be tested Test the next setup/hold combination To test the multiple-clock, multiple-edge, state acquisition To test the multiple-clock, multiple-edge, state acquisition Set up the Format menu Pod 1, channel Verify the test signal To test the multiple-clock, multiple-edge, state acquisition 0.0 ns 4.5 ns 2.5 ns Select the clocks to be tested To test the multiple-clock, multiple-edge, state acquisition Select the clocks to be tested Hen continue through the complete test Set up the pulse generator according to the following table To test the single-clock, multiple-edge, state acquisition To test the single-clock, multiple-edge, state acquisition Set up the Format menu Channel Verify the test signal To test the single-clock, multiple-edge, state acquisition These procedures Logic analyzer Format menu, select Master Clock Oscilloscope Timebase Delay Test the next clock To test the time interval accuracy EXT Trig Function Generator Setup To test the time interval accuracy Set up the Format menu Set up the Waveform menu. a Press the Waveform key Acquire the data Performance Test Record Performance Test Record 1664A Logic Analyzer Performance Test Record Calibrating and Adjusting Calibrating and Adjusting Logic analyzer calibration To adjust the CRT monitor alignment Cause personal injury To adjust the CRT monitor alignment Enter the Sys PV tests, then enter the Display Test To adjust the CRT intensity Press the front panel Select key To adjust the CRT intensity Troubleshooting Troubleshooting To use the flowcharts Troubleshooting To use the flowcharts Troubleshooting Troubleshooting Troubleshooting To use the flowcharts To use the flowcharts Troubleshooting Troubleshooting Troubleshooting Troubleshooting Troubleshooting Troubleshooting To check the power-up tests To check the power-up testsAs the tests complete, check if they pass or fail To run the self-tests Select the Chip 5 Tests menu and press the Select keyTo run the self-tests To run the self-tests To run the self-tests Select the Front Panel Test To run the self-tests Load the +5.00 V supply with a 2 Ω, 25 watt resistor To test the power supply voltagesTo test the power supply voltages Loaded by the acquisition board Signals on the Power Supply Cable To test the CRT monitor signals To test the CRT monitor signalsCRT Monitor Cable Signals To test the keyboard signals To test the keyboard signalsTurn off the instrument and remove the power cable Keyboard Connector Signals To test the disk drive voltages To test the disk drive voltages Pin Signal Description Disk Drive Voltages Press the Config key Assign pods 1 and 2 to Machine To perform the BNC testTo perform the BNC test Set up the logic analyzer Configuration menu To test the logic analyzer probe cablesTo test the logic analyzer probe cables Set up the Format menu. a Press the Format key Select Clear Trigger, then select All Return to the troubleshooting flowchart To test the auxiliary power To test the auxiliary power Replacing Assemblies Replacing Assemblies Exploded View Listing Replacing Assemblies To remove and replace the feet and tilt stand Reverse this procedure to install the coverTo remove and replace the handle To remove and replace the cover To remove and replace the disk drive Using previous procedures, remove the following assembliesReverse this procedure to install the disk drive To remove and replace the disk drive To remove and replace the power supply To remove and replace the power supplyTo remove and replace the Main Circuit board To remove and replace the switch actuator assembly Verify the push-on, push-off action of the assemblyTo remove and replace the switch actuator assembly To remove and replace the rear panel assembly To remove and replace the rear panel assembly To remove and replace the intensity adjustment To remove and replace the front panel and keyboardTo remove and replace the front panel and keyboard To remove and replace the handle plate Reverse this procedure to install the handle plateTo remove and replace the monitor To remove and replace the monitor To remove and replace the fan To remove and replace the line filterTo remove and replace the fan To remove and replace the optional Gpib and RS-232C cables Package the logic analyzer Remove accessories from the logic analyzerTo return assemblies Seal the shipping container securely, and mark it Fragile Replaceable Parts Parts not listed Parts listedReplaceable Parts Ordering Direct mail order system Exploded View Exploded View Replaceable Parts List Replaceable Parts List Replaceable Parts List 1664A Replaceable Parts Agilent Des Part Qty Description Number MP1 RS-232 loopback connector Power Cables and Plug Configurations Power Cables and Plug Configurations Theory of Operation Theory of Operation Block-Level Theory 1664A Logic Analyzer CRT Controller and Display RAM 1664A TheorySystem Memory Disk Drive Controller External Keyboard Interface CRT Monitor AssemblyPower Supply Centronix Interface Theory of Operation Logic Acquisition Circuitry Main Circuit Board Logic Acquisition Theory Probing ComparatorsAcquisition Threshold Test and Clock Synchronization Circuit Power-up Self-Tests Self-Tests DescriptionROM Test RAM Test System Tests System PVSystem Tests System PV Interrupt Test HIL Test Gpib TestRS-232C Test Disk Test Perform Test All Front Panel TestDisplay Test Board Test Analyzer Tests Analy PVAnalyzer Tests Analy PV Chip Tests Data Input Inspection Gpib Optional RS-232C Signal Definitions RS-232COptional Centronix Signal Definitions CentronixPage Declaration of Conformity Page Document Warranty Product Warranty