Agilent Technologies 01664-97005 manual Logic analyzer Format menu, select Master Clock

Testing Performance

To test the single-clock, multiple-edge, state acquisition

		Check the setup/hold combination
	1 Select the logic analyzer setup/hold time.
		a In the logic analyzer Format menu, select Master Clock.
		The first time through this test, assign the clocks according to the first testing combination in
N O T E
		step 3 of these procedures.

bIn the Master Clock menu, select Setup/Hold.

cIn the Setup/Hold menu, select the setup/hold field, then select for all pods the setup/hold combination to be tested. The first time through this test, use the top combination in the following table.

Setup/Hold Combinations

4.0/0.0 ns

0.0/4.0 ns

2.0/2.0 ns

dSelect Done to exit the setup/hold combinations.

2Using the Delay mode of the pulse generator Channel 2, position the pulses according to the setup time of the setup/hold combination selected, +0.0 ps or -100.0 ps.

a In the oscilloscope Delta V menu, set the Marker 1 Position to Chan 1, then set Marker 1 at -1.3000 V. Set the Marker 2 Position to Chan 2, then set Marker 2 at -1.3000 V.

bIn the oscilloscope Delta T menu, select Start on Pos Edge 1. Select Stop on Pos Edge 1. Select Precision Edge Find.

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