32581C

Electrical Specifications

 

 

IDE_DREQ0 (device)

IDE_DACK0 (host)

tRP

IDE_IOW0(STOP0) (host)

 

 

 

 

tSR

 

 

 

 

 

 

 

IDE_IOR0(HDMARDY0)

 

 

 

tRFS

(host)

 

 

 

IDE_IRDY0 (DSTROBE0) (device)

IDE_DATA[15:0] (device)

Notes:

1)The host can assert IDE_IOW[0:1]# (STOP[0:1]#) to request termination of the UltraDMA burst no sooner than tRP after IDE_IOR[0:1]# (HDMARDY[0:1]#) is de-asserted.

2)If the tSR timing is not satisfied, the host may receive up to two additional data WORDs from the device.

Figure 9-29. Host Pausing an UltraDMA Data In Burst Timing Diagram

392

AMD Geode™ SC3200 Processor Data Book

Page 392
Image 392
AMD SC3200 manual IDEDREQ0 device IDEDACK0 host, IDEIOW0STOP0 host, IDEIOR0HDMARDY0, 392