AMD SC3200 Field Interrupt Capture VBI Mode, Ping-pongs between the two buffers during runtime

32581C	Video Processor Module
3) Field Interrupt.	7.2.1.3 Capture VBI Mode

When the field interrupt occurs on the completion of an odd field, the interrupt must program the Video Data Odd Base Address with the other buffer’s address. The odd field will ping-pong between the two buffers. When the interrupt is due to the completion of an even field, the interrupt handler must program the GX1 module’s video buffer start offset value (GX_BASE+Memory Offset 8320h) with the address of the frame (both odd and even fields) that was just received from the VIP block. This new address will not take affect until the start of a new frame. It must also program the Video Data Even Base Address with the other buffer so that the even field will ping-pong just like the odd field. The field just received can be known by reading the Cur- rent Field bit (F4BAR2+Memory Offset 08h[24]).

There are three types of VBI data defined by the CCIR-656 protocol: Task A data, Task B data, and Ancillary data. The VIP block supports the capture for each data type. Gener- ally Task A data is the data type captured. Just as in Cap- ture Video mode, there are three registers that tell the bus master where to put the raw VBI data in the GX1 module’s frame buffer. Once the raw VBI data has been captured, the data can be manipulated or decoded. The data can also be used by an application. An example of this would be an Internet address that is encoded on one or more of the VBI lines, or have an application decode the Closed Captioning information put in the graphics frame buffer.

The registers, F4BAR2+Memory Offset 40h, 44h, and 48h, tell the bus master the destination addresses for the VBI data in the GX1 module’s frame buffer. Five bits (F4BAR2+Memory Offset 00h[21:17]) are used to tell the bus master the data types to store. Capture VBI mode needs to be enabled at F4BAR2+Memory Offset 04h[9,1:0]. The Field Interrupt bit (F4BAR2+Memory Offset 04h[16]) should be used by the software driver to know when the captured VBI data has been completed for a field.

Ping-pongs between the two buffers during runtime

Video Data Odd Base	Video Frame Buffer #1
	1 Odd Field
F4BAR2+Memory Offset 20h
Video Data Even Base	Even Field
F4BAR2+Memory Offset 24h	Line 2 Odd
	Line 2 Even
	Line n-1 Odd Field
	Line n-1 Even Field
	Line n Odd Field
	Line n Even Field

Video Data Even Base	Video Frame Buffer #2
	Line 1 Odd Field
F4BAR2+Memory Offset 20h
Video Data Even Base	Line 1 Even Field
F4BAR2+Memory Offset 24h	Line 2 Odd Field
	Line 2 Even Field
VID_START_OFFSET
GX_BASE+Memory Offset 8320h
Ping-pongs between the	Line n-1 Odd Field
two buffers during runtime	Line n-1 Even Field
	Line n Odd Field
Odd and Even fields are	Line n Even Field
“Weaved” together

30 frames per second

Capture video fill sequence

GX1 Module’s Display Controller empty sequence

GX1 Module’s Video Frame Buffer

Buf #1 Buf #2

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

				5
1	2	3	4	5	6	7	8	9	10 11 12 13 14 15 16 17 18 19 20 21	22	23

85 frames per second

Figure 7-6. Capture Video Mode Weave Example Using Two Video Frame Buffers

316 AMD Geode™ SC3200 Processor Data Book