AMD SC3200 manual Parallel Port Interface Signals

Signal Definitions 32581C

3.4.12Parallel Port Interface Signals

Signal Name	Ball No.	Type	Description	Mux
ACK#	B18	I	Acknowledge. Pulsed low by the printer to indicate that it	TFTDE+FPCICLK
			has received data from the Parallel Port.
AFD#/DSTRB#	D22	O	Automatic Feed. When low, instructs the printer to auto-	TFTD2+INTR_O
			matically feed a line after printing each line. This signal is
			in TRI-STATE after a 0 is loaded into the corresponding
			control register bit. An external 4.7 KΩ pull-up resistor
			should be attached to this ball.
			Data Strobe (EPP). Active low, used in EPP mode to
			denote a data cycle. When the cycle is aborted, DSTRB#
			becomes inactive (high).
BUSY/WAIT#	B17	I	Busy. Set high by the printer when it cannot accept	TFTD3+F_C/BE1#
			another character.
			Wait. In EPP mode, the Parallel Port device uses this
			active low signal to extend its access cycle.
ERR#	D21	I	Error. Set active low by the printer when it detects an	TFTD4+F_C/BE0#
			error.
INIT#	B21	O	Initialize. When low, initializes the printer. This signal is	TFTD5+SMI_O
			in TRI-STATE after a 1 is loaded into the corresponding
			control register bit. Use an external 4.7 KΩ pull-up resis-
			tor.
PD7	A18	I/O	Parallel Port Data. Transfer data to and from the periph-	TFTD13+F_AD7
			eral data bus and the appropriate Parallel Port data regis-
PD6	A20			TFTD1+F_AD6
			ter. These signals have a high current drive capability.
PD5	C19			TFTD11+F_AD5
PD4	C18			TFTD10+F_AD4
PD3	C20			TFTD9+F_AD3
PD2	D20			TFTD8+F_AD2
PD1	A21			TFTD7+F_AD1
PD0	C21			TFTD6+F_AD0
PE	D17	I	Paper End. Set high by the printer when it is out of	TFTD14+F_C/BE2#
			paper.
			This ball has an internal weak pull-up or pull-down resis-
			tor that is programmed by software.
SLCT	C17	I	Select. Set active high by the printer when the printer is	TFTD15+F_C/BE3#
			selected.
SLIN#/ASTRB#	B20	O	Select Input. When low, selects the printer. This signal	TFTD16+
			is in TRI-STATE after a 0 is loaded into the corresponding	F_IRDY#
			control register bit. Uses an external 4.7 KΩ pull-up resis-
			tor.
			Address Strobe (EPP). Active low, used in EPP mode to
			denote an address or data cycle. When the cycle is
			aborted, ASTRB# becomes inactive (high).

AMD Geode™ SC3200 Processor Data Book 61