List of Tables

32581C

 

Table 6-22.

F3: PCI Header Registers for Audio Support Summary

181

Table 6-23.

F3BAR0: Audio Support Registers Summary

182

Table 6-24.

F5: PCI Header Registers for X-Bus Expansion Support Summary

183

Table 6-25.

F5BAR0: I/O Control Support Registers Summary

183

Table 6-26.

PCIUSB: USB PCI Configuration Register Summary

184

Table 6-27.

USB_BAR: USB Controller Registers Summary

185

Table 6-28.

ISA Legacy I/O Register Summary

186

Table 6-29.

F0: PCI Header/Bridge Configuration Registers for GPIO and LPC Support

188

Table 6-30.

F0BAR0+I/O Offset: GPIO Configuration Registers

222

Table 6-31.

F0BAR1+I/O Offset: LPC Interface Configuration Registers

226

Table 6-32.

F1: PCI Header Registers for SMI Status and ACPI Support

234

Table 6-33.

F1BAR0+I/O Offset: SMI Status Registers

235

Table 6-34.

F1BAR1+I/O Offset: ACPI Support Registers

245

Table 6-35.

F2: PCI Header/Channels 0 and 1 Registers for IDE Controller Configuration

255

Table 6-36.

F2BAR4+I/O Offset: IDE Controller Configuration Registers

259

Table 6-37.

F3: PCI Header Registers for Audio Configuration

261

Table 6-38.

F3BAR0+Memory Offset: Audio Configuration Registers

262

Table 6-39.

F5: PCI Header Registers for X-Bus Expansion

276

Table 6-40.

F5BAR0+I/O Offset: X-Bus Expansion Registers

280

Table 6-41.

PCIUSB: USB PCI Configuration Registers

282

Table 6-42.

USB_BAR+Memory Offset: USB Controller Registers

285

Table 6-43.

DMA Channel Control Registers

295

Table 6-44.

DMA Page Registers

300

Table 6-45.

Programmable Interval Timer Registers

301

Table 6-46.

Programmable Interrupt Controller Registers

303

Table 6-47.

Keyboard Controller Registers

306

Table 6-48.

Real-Time Clock Registers

307

Table 6-49.

Miscellaneous Registers

307

Table 7-1.

Valid Mixing/Blending Configurations

321

Table 7-2.

Truth Table for Alpha Blending

323

Table 7-3.

F4: PCI Header Registers for Video Processor Support Summary

327

Table 7-4.

F4BAR0: Video Processor Configuration Registers Summary

327

Table 7-5.

F4BAR2: VIP Support Registers Summary

329

Table 7-6.

F4: PCI Header Registers for Video Processor Support Registers

330

Table 7-7.

F4BAR0+Memory Offset: Video Processor Configuration Registers

332

Table 7-8.

F4BAR2+Memory Offset: VIP Configuration Registers

345

Table 8-1.

JTAG Mode Instruction Support

349

Table 9-1.

Electro Static Discharge (ESD)

351

Table 9-2.

Absolute Maximum Ratings

351

Table 9-3.

Operating Conditions

352

Table 9-4.

Power Planes of External Interface Signals

353

Table 9-5.

System Conditions Used to Measure SC3200 Current During On State

354

Table 9-6.

DC Characteristics for On State

354

Table 9-7.

DC Characteristics for Active Idle, Sleep, and Off States

355

Table 9-8.

Ball Capacitance and Inductance

355

Table 9-9.

Balls with PU/PD Resistors

356

Table 9-10.

Buffer Types

357

Table 9-11.

Default Levels for Measurement of Switching Parameters

362

Table 9-12.

Memory Controller Timing Parameters

364

Table 9-13.

Video Input Port Timing Parameters

366

Table 9-14.

TFT Timing Parameters

367

Table 9-15.

ACCESS.bus Input Timing Parameters

368

Table 9-16.

ACCESS.bus Output Timing Parameters

368

Table 9-17.

PCI AC Specifications

371

Table 9-18.

PCI Clock Parameters

373

AMD Geode™ SC3200 Processor Data Book

11

Page 11
Image 11
AMD SC3200 manual F3BAR0 Audio Support Registers Summary, F5BAR0 I/O Control Support Registers Summary, DMA Page Registers