AMD SC3200 manual Nand Eeprom, SuperI/O Module, Other Features

Overview 32581C

■PCI Bus Interface:

—PCI v2.1 compliant with wakeup capability

—32-Bit data path, up to 33 MHz

—Glueless interface for an external PCI device

—Fixed priority

—3.3V signal support only

■Sub-ISA Bus Interface:

—Up to 16 MB addressing

—Supports a chip select for ROM or Flash EPROM boot device

—Supports either:

–M-Systems DiskOnChip DOC2000 Flash file system

–NAND EEPROM

—Supports up to two chip selects for external I/O devices

—8-Bit (optional 16-bit) data bus width

—Shares balls with PCI signals

—Is not a subtractive agent

■IDE Interface:

—Two IDE channels for up to four external IDE devices

—Supports ATA-33 synchronous DMA mode transfers, up to 33 MB/s

■Universal Serial Bus (USB):

—USB OpenHCI v1.0 compliant

—Three ports

SuperI/O Module

■Real-Time Clock (RTC):

—DS1287, MC146818 and PC87911 compatible

—Multi-century calendar

■ACCESS.bus (ACB) Interface:

—Two ACB interface ports

■Parallel Port:

—EPP 1.9 compliant

—IEEE 1284 ECP compliant, including level 2

■Serial Port (UART):

—UART1, 16550A compatible (SIN, SOUT, BOUT pins), used for SmartCard interface

—UART2, 16550A compatible

—Enhanced UART with fast Infrared (IR)

Other Features

■High-Resolution Timer:

—32-Bit counter with 1 μs count interval

■WATCHDOG Timer:

—Interfaces to INTR, SMI, Reset

■Clocks:

—Input (external crystals):

–32.768 KHz (internal clock oscillator)

–27 MHz (internal clock oscillator)

—Output:

–AC97 clock (24.576 MHz)

–Memory controller clock (66 MHz to 100 MHz)

–PCI clock (33 MHz)

■JTAG Testability:

—Bypass, Extest, Sample/Preload, IDcode, Clamp, HiZ

■Voltages

—Internal logic: 266 or 233 MHz @ 1.8V

—Standby logic: 266 or 233 MHz @ 1.8V

—I/O: 3.3V

—Standby I/O: 3.3V

—Battery (if used): 3.0V

AMD Geode™ SC3200 Processor Data Book 15