ARM ARM DUI 0224I

Hardware Description

Note

Although it is possible to connect both the CLCD adaptor board and an off board

SSP device at the same time, care must be taken to ensure the correct SSP

interface protocol is used when communicating with each device. The interface

can be shared because the data from the touch screen controller data (TSMISO)

is buffered with an open drain driver into SSPRXD.

• Synthesized SSP peripherals in a RealView Logic Tile FPGA. See Appendix F

RealView Logic Tile.

Note

Use the RealView Logic Tile HDRY signal YL62 (nDRVINEN1) to disable the

SSP buffer and avoid conflicts between the peripheral in the RealView Logic Tile

and the LCD adaptor board or SSP expansion header.

See also Synchronous Serial Port, SSP on page4-89 and the ARM PrimeCell

Synchronous Serial Port Controller (PL022) Technical Reference Manual.