ARM ARM DUI 0224I manual Xii

List of Tables

Table A-6	CLCD Interface board connector J18	A-10
Table A-7	VGA connector signals	A-13
Table A-8	Mouse and keyboard port signal descriptions	A-15
Table A-9	Ethernet signals	A-16
Table A-10	HDRX (J9) signals	A-18
Table A-11	HDRY (J12) signals	A-22
Table A-12	HDRZ (J8) signals	A-26
Table A-13	Test point functions	A-34
Table A-14	Trace connector J14	A-37
Table A-15	AHB monitor connector J17	A-39
Table A-16	FPGA debug connector J39	A-40
Table B-1	PB926EJ-S electrical characteristics	B-2
Table B-2	Current requirements from DC IN (12V)	B-3
Table B-3	Current requirements from J34	B-3
Table B-4	Maximum current load on supply voltage rails	B-4
Table B-5	ARM926EJ-S PXP Development Chip bus timing	B-6
Table B-6	ARM926EJ-S PXP Development Chip memory timing	B-7
Table B-7	Peripherals and controller timing	B-8
Table C-1	Displays available with adaptor board	C-7
Table C-2	Power configuration	C-9
Table C-3	Touchscreen host interface signal assignment	C-11
Table C-4	CLCD interface connector J2	C-15
Table C-5	LCD prototyping connector J1	C-16
Table C-6	Touchscreen prototyping connector J3	C-17
Table C-7	Inverter prototyping connector J4	C-17
Table C-8	A/D and keypad J13	C-18
Table D-1	LED indicators	D-7
Table D-2	Configuration switches	D-8
Table D-3	Power and reset switches	D-8
Table D-4	Test points	D-8
Table D-5	ATX power connector	D-10
Table D-6	Mictor connector pinout	D-11
Table E-1	Memory width encoding	E-4
Table E-2	Chip Select information block	E-7
Table E-3	Example contents of a static memory expansion EEPROM	E-8
Table E-4	Example contents of a dynamic memory expansion EEPROM	E-11
Table E-5	SDR, Single data rate dynamic memory connector signals	E-14
Table E-6	Static memory connector signals	E-16
Table F-1	RealView Logic Tile clock signals	F-8
Table G-1	Reset behavior register names and values	G-11
Table G-2	Device property register names and values	G-12

xii Copyright © 2003-2010 ARM Limited. All rights reserved. ARM DUI 0224I