Programmer’s Reference
ARM DUI 0224I Copyright © 2003-2010 ARM Limited. All rights reserved. 4-99
4.26 USB interfaceThe USB interface is provided by an OTG243 controller that provides a standard USB
host controller and an On-The-Go (OTG) dual role device controller. The USB host has
one or two downstream ports. The OTG can function as either a host or slave device.
The OTG243 has the following features:
• fully compliant to the USG On-The-Go specification
• configurable number of downstream and upstream hosts or functions
• USB host is USB 2.0 compliant and supports 12Mb/s and 1.5Mb/s
• programmable interrupts and DMA
• 4KB on-chip RAM.
The OTG243 register base addresses are shown in Table4-75.
Table4-74 USB implementation
Property Value
Location Board (an OTG243 chip)
Memory base address
0x10020000
, the registers in the OTG243 are memory-mapped
onto the AHB M2 bus
Interrupt 26 on primary and secondary controllers
DMA There are two DMA channels available for the USB controller.
These are selectable as 0,1, or 2. See Direct Memory Access
Controller and mapping registers on page4-52.
Release version Custom interface in FPGA to external OTG243 controller
Reference documentation TransDimension OTG243 Data Sheet (see also USB interface
on page 3-92 and test program supplied on the CD)
Table4-75 USB controller base address
Address Description
0x10020000
Chip-level register bank
0x10020080
Host controller register bank
0x10020100
Function controller register bank