ARM ARM DUI 0224I manual RealView Logic Tile

			RealView Logic Tile
		Table F-1 RealView Logic Tile clock signals (continued)
PB926EJ-S signal	RealView Logic Tile	Direction	Description
	signal (top header)
HCLKM2L2F	XU129	From tile	RealView Logic Tile clock to multiplexor that
			provides M2 clock for the FPGA.
HCLKSL2F	XU130	From tile	RealView Logic Tile clock to multiplexor that
			provides S clock for the FPGA.
HCLKM1L2S	XU131	From tile	RealView Logic Tile clock to multiplexor that
			provides M1 clock for the development chip.
HCLKM2L2S	XU132	From tile	RealView Logic Tile clock to multiplexor that
			provides M2 clock for the development chip.
HCLKSL2S	XU133	From tile	RealView Logic Tile clock to multiplexor that
			provides S clock for the development chip.
AHBMONCLK1	XU93	To tile	AHB monitor clock from ARM926EJ-S PXP
			Development Chip to RealView Logic Tile.

ARM DUI 0224I Copyright © 2003-2010 ARM Limited. All rights reserved. F-9