Programmer’s Reference
4-16 Copyright © 2003-2010 ARM Limited. All rights reserved. ARM DUI 0224I
Memory banksTable4-3 lists the controller memory banks, chip selects, and mem ory range.
Table4-3 Memory chip selects and address rang e
Bank Chip select Address range Device
MPMC bank 4 nMPMCDYCS0
0x00000000–0x07FFFFFF
SDRAM
MPMC bank 5 nMPMCDYCS1
0x08000000–0x0FFFFFFF
Expansion dynamic memory
MPMC bank 6 nMPMCDYCS2
0x70000000–0x77FFFFFF
Expansion dynamic memory
MPMC bank 7 nMPMCDYCS3
0x78000000–0x7FFFFFFF
Expansion dynamic memory
SSMC bank 0 nSTATICCS0
0x30000000–0x33FFFFFF
NOR flash 2
SSMC bank 7 nSTATICCS1
0x34000000–0x37FFFFFF
NOR flash 1
SSMC bank 3 nSTATICCS2
0x38000000–0x3BFFFFFF
SRAM
SSMC bank 1 nSTATICCS3
0x3C000000–0x3FFFFFFF
Expansion static memory
SSMC bank 4 nSTATICCS4
0x20000000–0x23FFFFFF
Expansion static memory
SSMC bank 5 nSTATICCS5
0x24000000–0x27FFFFFF
Expansion static memory
SSMC bank 6 nSTATICCS6
0x28000000–0x2BFFFFFF
Expansion static memory
SSMC bank 1 nSTATICCS7
0x2C000000–0x2FFFFFFF
Expansion static memory