ARM DUI 0224I Copyright © 2003-2010 ARM Limited. All rights reserved. Index-1
Index

A

AACI
interface 4-42
specification 3-56
AHB
asynchronous mode 3-43
bridges 3-10
expansion memory 4-14
matrix 3-11
memory map 3-12
monitor 3-16, 4-41
monitor signals A-38
RealView Logic Tile F-11
timing B-6

B

Block diagram
AACI 3-57
AHB Monitor 3-16
asynchronous mode 3-44
character LCD 3-59
CLCD board power C-9
CLCDC 3-61
clocks 3-35, 3-41
configuration 3-9
development chip 3-3
DMA 3-65
Ethernet 3-68
FPGA 3-17
FPGA configuration 3-18
GPIO 3-71
interrupt 3-72
JTAG 3-100
KMI 3-74
MCI 3-76
memory expansion E-2
multiple masters 3-12
PCI 3-79
power 3-33
reset logic 3-22
SCI 3-81
serial bus 3-80
SSP 3-84
system 1-6
UART 3-89
USB 3-92
Boot
memory configuration 2-3
register 4-34
Boot Monitor
bootscript 2-25
commands 2-16
configuration 2-7
I/O 2-21
library 2-23
loading into flash 2-20
rebuilding 2-18, 2-22
running 2-14
running application 2-24

C

Character LCD 3-59
ChipScope
Logic Analyzer 3-104