CLCD Display and Adaptor Board
C-10 Copyright © 2003-2010 ARM Limited. All rights reserved. ARM DUI 0224I

Figure C-6 CLCD buffer and power supply control links

J2 Expansion connector (to development board)
J1 prototyping connector
J4 Inverter
prototype
connector
VDDPOSSWITCH
VDDNEGSWITCH
CLPOWER
Power
SWITCHED
FIXED
SWITCHED_VDD_NEG
SWITCHED_VDD_POS
SWITCHED_CLPWR
SWITCHED_FIXED
J3 prototyping
connector
5V
3V3
VIN
VR4
INV_IO
BRIGHTNESS
LCD_IO_VDD
Video signals R[7:0], G[7:0], B[7:0]
TSx
Buffers
Touch screen
controller
PWR3V5VSWITCH
nLCDIOON
Power
CL
Power
VDD POS
Power
VDD NEG
1V8
J10 Sharp
J12
Sharp inverter
Sharp, Sanyo IC, and Epson LCD connector
J13
AUX/Batt/keypad
connector
DACOUT
J8 Sanyo
J9
Sanyo inverter
Buffer I/O
voltage
Enable V+
LCD_ID[4:0]
LCD ID resistor
links
Link 2
Link 11
Link 14
Link 13
Link 12
Link 16
Link 3
R25 (remove for
fixed VDD_POS)
Link 1
GND
Link 15
Switch
S2
LCD_LEFT_RIGHT
LCD_UP_DOWN
Buffered video signals (BUFR_R[7:0],
BUFR_G[7:0], and BUFR_B[7:0] )
Sync signals (CLLE, CLLP, CLFP,
CLAC, and CLCP)
Buffered sync signals (BUF_CLLE,
BUF_CLLP, BUF_CLFP, BUF_CLAC,
and BUF_CLCP)