ARM ARM DUI 0224I manual Switch is ON, the corresponding Bootcssel signal is High, Enable Sdram at

Models: ARM DUI 0224I

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Programmer’s Reference

 

 

Configuration switch S1 modifies the memory map of static memory at reset as listed

 

 

in Table 4-2. S1-1 controls BOOTCSSEL0 and S1-2 controls BOOTCSSEL1. If a

 

 

switch is ON, the corresponding BOOTCSSEL signal is HIGH.

 

 

Table 4-2 Selecting the boot device

 

 

 

S1-2

S1-1

Device

 

 

 

OFF

OFF

Reserved. (selects NOR flash 2)

 

 

 

OFF

ON

NOR flash 1, see Booting from NOR flash 1 on page 4-12

 

 

 

ON

OFF

Reserved

 

 

 

ON

ON

AHB expansion memory on a RealView Logic Tile, see Booting from AHB expansion

 

 

memory on page 4-14

 

 

 

 

 

A simplified version of the remap logic is shown in Figure 3-14 on page 3-28.

 

 

Removing boot remapping and enabling SDRAM at 0x0

 

 

The ARM926EJ-S PXP Development Chip begins executing at 0x0 after a reset. But

 

 

because DEVCHIP REMAP and FPGA_REMAP are active at reset, the remapping

 

 

logic uses causes boot instructions to be fetched from non-volatile static memory.

 

 

The boot code must perform the following actions on reset to remove the remapping and

 

 

enable SDRAM at 0x0:

1.At reset, the remap signals are both high, therefore static memory is remapped to address 0x0. Perform any critical CPU initialization at this time.

Ensure that you do not access SDRAM at this point as it has not been initialized.

2.For NOR flash 1 (nNORCS), jump to a location in the range

0x34000000–0x37FFFFFF. Jumping out of the range 0x000000000–0x03FFFFFF means that the remapped memory at 0x0 is no longer needed and can be unmapped.

The code jumps to 0x34000000–0x37FFFFFFrather than the physical location of the boot memory because the boot code does not know which physical memory device it is located in and because the control registers for the other static memory device selects are not installed.

Note

For AHB expansion memory on a RealView Logic Tile, the jump location depends on the decoding address for the AHB expansion memory (typically in the range 0x14000000–0x1FFFFFFF). AHB memory is not aliased at

0x34000000–0x37FFFFFF.

4-10

Copyright © 2003-2010 ARM Limited. All rights reserved.

ARM DUI 0224I

Page 176
Image 176
ARM ARM DUI 0224I Switch is ON, the corresponding Bootcssel signal is High, Removing boot remapping and enabling Sdram at