Fujitsu Fujitsu SPARC64 V manual Table C-1SPARC64 V Implementation Dependencies 7

TABLE C-1SPARC64 V Implementation Dependencies (7 of 11)

Nbr	SPARC64 V Implementation Notes	Page
206	SHUTDOWN instruction	58
	In privileged mode the SHUTDOWN instruction executes as a NOP in
	SPARC64 V.
207	PCR register bits 47:32, 26:17, and bit 3	20, 21,
	SPARC64 V uses these bits for the following purposes:	201
	• Bits 47:32 for set/clear/show status of overflow (OVF).

• Bit 26 for validity of OVF field (OVRO).

• Bits 24:22 for number of counter pair (NC).

• Bits 20:18 for counter selector (SC).

• Bit 3 for validity of SU/SL field (ULRO).

Other implementation-dependent bits are read as 0 and writes to them are ignored.

208	Ordering of errors captured in instruction execution	—
	The order in which errors are captured during instruction execution is
	implementation dependent. Ordering can be in program order or in order of
	detection.
209	Software intervention after instruction-induced error	—
	Precision of the trap to signal an instruction-induced error for which
	recovery requires software intervention is implementation dependent.
210	ERROR output signal	—
	The causes and the semantics of ERROR output signal are implementation
	dependent.
211	Error logging registers’ information	—
	The information that the error logging registers preserves beyond the reset
	induced by an ERROR signal is implementation dependent.
212	Trap with fatal error	—
	Generation of a trap along with ERROR signal assertion upon detection of a
	fatal error is implementation dependent.
213	AFSR.PRIV	—
	SPARC64 V does not implement the AFSR.PRIV bit.
214	Enable/disable control for deferred traps	—
	SPARC64 V does not implement a control feature for deferred traps.
215	Error barrier	—
	DONE and RETRY instructions may implicitly provide an error barrier
	function as MEMBAR #Sync. Whether DONE and RETRY instructions provide
	an error barrier is implementation dependent.
216	data_access_error trap precision	—
	data_access_error trap is always precise in SPARC64 V.
217	instruction_access_error trap precision	—
	instruction_access_error trap is always precise in SPARC64 V.

76 SPARC JPS1 Implementation Supplement: Fujitsu SPARC64 V • Release 1.0, 1 July 2002