Fujitsu Fujitsu SPARC64 V manual ADE trap, W, Table P-19ASR Error Handling

TABLE P-18Register Error Handling (Excluding ASRs and ASI Registers)

		Error
Register Name	RW	Protect	Error Detect Condition	Error Type	Correction
TPC	RW	Parity	InstAccess	IUG_TSTATE	W
TNPC	RW	Parity	InstAccess	IUG_TSTATE	W
TSTATE	RW	Parity	InstAccess	IUG_TSTATE	W
WSTATE	RW	Parity	InstAccess	IUG_TSTATE	W
VER	R	None	—	—	—
FSR	RW	Parity	Always	IUG_%F	ADE trap, W

P.8.2 ASR Error Handling

The terminology used in TABLE P-19is defined as follows:

Column	Term	Meaning
Error Detect	AUG always	The error is detected while
Condition		(ASI_ERROR_CONTROL.UGE_HANDLER = 0) &&
		(ASI_ERROR_CONTROL.WEAK_ED = 0)
	InstAccess	The error is detected when the instruction accesses the
		register.
Error Type	(I)AUG_xxx	The error is indicated by ASI_UGESR.IAUG_xxx = 1, and
		the error is an autonomous urgent error.
	I(A)UG_xxx	The error is indicated by ASI_UGESR.IAUG_xxx = 1, and
		the error is an instruction urgent error.
Correction	W	The error is removed by a full write to the register by an
		instruction.
	ADE trap	The error is removed by a full write to the register in the
		async_data_error hardware trap sequence.

TABLE P-19shows the handling of ASR errors.

TABLE P-19ASR Error Handling

ASR
Number Register Name		RW	Error Protect	Error Detect Condition	Error Type	Correction
0	Y	RW	Parity	InstAccess	IUG_%R	W

1—

2	CCR	RW	Parity	Always	IUG_%R	ADE trap, W
3	ASI	RW	Parity	Always	IUG_%R	ADE trap, W
4	TICK	RW	None	—	—	—

182 SPARC JPS1 Implementation Supplement: Fujitsu SPARC64 V • Release 1.0, 1 July 2002