Fujitsu Fujitsu SPARC64 V manual Version VER Register, Ancillary State Registers ASRs

Models: Fujitsu SPARC64 V

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privileged_action
PCR.PRIV = 0,
privileged_action

Note Spurious setting of the PSTATE.RED bit by privileged software should not be performed, since it will take the SPARC64 V into RED_state without the required sequencing.

5.2.9Version (VER) Register

TABLE 5-1shows the values for the VER register for SPARC64 V.

TABLE 5-1VER Register Encodings

Bits

Field

Value

 

 

 

63:48

manuf

000416 (impl. dep. #104)

47:32

impl

5 (impl. dep. #13)

31:24

mask

n (The value of n depends on the processor chip version)

15:8

maxtl

5

4:0

maxwin

7

 

 

 

The manuf field contains Fujitsu’s 8-bit JEDEC code in the lower 8 bits and zeroes in the upper 8 bits. The manuf, impl, and mask fields are implemented so that they may change in future SPARC64 V processor versions. The mask field is incremented by 1 any time a programmer-visible revision is made to the processor. See the SPARC64 V Data Sheet to determine the current setting of the mask field.

5.2.11Ancillary State Registers (ASRs)

Please refer to Section 5.2.11 of Commonality for details of the ASRs.

Performance Control Register (PCR) (ASR 16)

SPARC64 V implements the PCR register as described in SPARC JPS1 Commonality, with additional features as described in this section.

In SPARC64 V, the accessibility of PCR when PSTATE.PRIV = 0 is determined by PCR.PRIV. If PSTATE.PRIV = 0 and PCR.PRIV = 1, an attempt to execute either

RDPCR or WRPCR will cause aexception. If PSTATE.PRIV = 0 and RDPCR operates without privilege violation and WRPCR causes a exception only when an attempt is made to change (that is, write 1

to) PCR.PRIV (impl. dep. #250).

See Appendix Q, Performance Instrumentation, for a detailed discussion of the PCR and PIC register usage and event count definitions.

20 SPARC JPS1 Implementation Supplement: Fujitsu SPARC64 V • Release 1.0, 1 July 2002

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Fujitsu Fujitsu SPARC64 V manual Version VER Register, Ancillary State Registers ASRs, Performance Control Register PCR ASR