Intel 8XC251SQ, 8XC251SA, 8XC251SP, 8XC251SB manual READ-MODIFY-WRITE Instructions

INPUT/OUTPUT PORTS

7.5READ-MODIFY-WRITE INSTRUCTIONS

Some instructions read the latch data rather than the pin data. The latch based instructions read the data, modify the data, and then rewrite the latch. These are called “read-modify-write” in- structions. Below is a complete list of these special instructions. When the destination operand is a port, or a port bit, these instructions read the latch rather than the pin:

ANL	(logical	AND, e.g., ANL P1, A)
ORL	(logical	OR, e.g., ORL		P2,	A)
XRL	(logical	EX-OR, e.g., XRL P3, A)
JBC	(jump if	bit = 1 and clear			bit, e.g., JBC P1.1, LABEL)
CPL	(complement		bit, e.g.,	CPL	P3.0)
INC	(increment,		e.g., INC P2)
DEC	(decrement,		e.g., DEC P2)
DJNZ	(decrement and jump if			not	zero,	e.g., DJNZ P3, LABEL)
MOV PX.Y, C	(move carry		bit to bit	Y of port		X)
CLR PX.Y	(clear bit Y of port X)
SETB PX.Y	(set bit	Y of port x)

It is not obvious that the last three instructions in this list are read-modify-write instructions. These instructions read the port (all 8 bits), modify the specifically addressed bit, and write the new byte back to the latch. These read-modify-write instructions are directed to the latch rather than the pin in order to avoid possible misinterpretation of voltage (and therefore, logic) levels at the pin. For example, a port bit used to drive the base of an external bipolar transistor cannot rise above the transistor’s base-emitter junction voltage (a value lower than VIL). With a logic one written to the bit, attempts by the CPU to read the port at the pin are misinterpreted as logic zero. A read of the latch rather than the pin returns the correct logic-one value.

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