8XC251SA, SB, SP, SQ USER’S MANUAL

Table A-24. Summary of Move Instructions (Continued)

Move (2)

 

MOV <dest>,<src>

destination src opnd

 

 

Move with Sign Extension

MOVS <dest>,<src>

destination src opnd with sign extend

Move with Zero Extension

MOVZ <dest>,<src>

destination src opnd with zero extend

Move Code Byte

MOVC <dest>,<src>

A code byte

 

 

 

Move to External Mem

MOVX <dest>,<src>

external mem (A)

 

 

 

Move from External Mem

MOVX <dest>,<src>

A source opnd in external mem

 

 

 

 

 

 

 

 

 

 

Mnemonic

<dest>,<src>

 

Notes

 

Binary Mode

Source Mode

 

 

 

 

 

 

 

 

 

Bytes

 

States

Bytes

States

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DRk,dir8

 

Dir addr to dword reg

 

4

 

6

3

5

 

 

 

 

 

 

 

 

 

 

DRk,dir16

 

Dir addr (64K) to dword reg

5

 

6

4

5

 

 

 

 

 

 

 

 

 

 

 

Rm,dir8

 

Dir addr to byte reg

 

4

 

3 (3)

3

2 (3)

 

 

 

 

 

 

 

 

 

 

 

WRj,dir8

 

Dir addr to word reg

 

4

 

4

3

3

 

 

 

 

 

 

 

 

 

 

 

Rm,dir16

 

Dir addr (64K) to byte reg

 

5

 

3

4

2

 

 

 

 

 

 

 

 

 

 

 

WRj,dir16

 

Dir addr (64K) to word reg

 

5

 

4

4

3

 

 

 

 

 

 

 

 

 

 

Rm,@WRj

 

Indir addr (64K) to byte reg

4

 

2

3

2

 

 

 

 

 

 

 

 

 

 

Rm,@DRk

 

Indir addr (16M) to byte reg

4

 

4

3

3

 

 

 

 

 

 

 

 

 

 

WRjd,@WRjs

 

Indir addr(64K) to word reg

4

 

4

3

3

 

 

 

 

 

 

 

 

 

 

WRj,@DRk

 

Indir addr(16M) to word reg

4

 

5

3

4

 

 

 

 

 

 

 

 

 

 

 

dir8,Rm

 

Byte reg to dir addr

 

4

 

4 (3)

3

3 (3)

 

 

 

 

 

 

 

 

 

 

 

dir8,WRj

 

Word reg to dir addr

 

4

 

5

3

4

MOV

 

 

 

 

 

 

 

 

 

dir16,Rm

 

Byte reg to dir addr (64K)

 

5

 

4

4

3

 

 

 

 

 

 

 

 

 

 

 

dir16,WRj

 

Word reg to dir addr (64K)

 

5

 

5

4

4

 

 

 

 

 

 

 

 

 

 

@WRj,Rm

 

Byte reg to indir addr (64K)

4

 

4

3

3

 

 

 

 

 

 

 

 

 

 

@DRk,Rm

 

Byte reg to indir addr (16M)

4

 

5

3

4

 

 

 

 

 

 

 

 

 

 

@WRjd,WRjs

 

Word reg to indir addr (64K)

4

 

5

3

4

 

 

 

 

 

 

 

 

 

 

@DRk,WRj

 

Word reg to indir addr (16M)

4

 

6

3

5

 

 

 

 

 

 

 

 

 

 

 

dir8,DRk

 

Dword reg to dir addr

 

4

 

7

3

6

 

 

 

 

 

 

 

 

 

 

dir16,DRk

 

Dword reg to dir addr (64K)

5

 

7

4

6

 

 

 

 

 

 

 

 

 

Rm,@WRj+dis16

Indir addr with disp (64K) to byte reg

5

 

6

4

5

 

 

 

 

 

 

 

 

 

WRj,@WRj+dis16

Indir addr with disp (64K) to word reg

5

 

7

4

6

 

 

 

 

 

 

 

 

 

Rm,@DRk+dis24

Indir addr with disp (16M) to byte reg

5

 

7

4

6

 

 

 

 

 

 

 

 

 

WRj,@DRk+dis24

Indir addr with disp (16M) to word reg

5

 

8

4

7

 

 

 

 

 

 

 

 

 

@WRj+dis16,Rm

Byte reg to Indir addr with disp (64K)

5

 

6

4

5

 

 

 

 

 

 

 

 

 

 

NOTES:

1.A shaded cell denotes an instruction in the MCS® 51 architecture.

2.Instructions that move bits are in Table A-26 on page A-23.

3.If this instruction addresses an I/O port (Px, x = 0–3), add 1 to the number of states.

4.External memory addressed by instructions in the MCS 51 architecture is in the region specified by DPXL (reset value = 01H). See section 3.1.1, “Compatibility with the MCS® 51 Architecture.”

A-20

Page 272
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Intel 8XC251SQ, 8XC251SA, 8XC251SP, 8XC251SB, Embedded Microcontroller manual Dir16,Rm Byte reg to dir addr 64K Dir16,WRj

Embedded Microcontroller, 8XC251SP, 8XC251SA, 8XC251SQ, 8XC251SB specifications

The Intel 8XC251 series of embedded microcontrollers is a family of versatile and powerful devices, designed to meet the demands of a wide range of applications. With models such as the 8XC251SB, 8XC251SQ, 8XC251SA, and 8XC251SP, this series offers unique features while maintaining a high level of performance and reliability.

At the heart of the 8XC251 microcontrollers is the 8051 architecture, which provides a 16-bit processor capable of executing complex instructions efficiently. This architecture not only allows for a rich instruction set but also facilitates programming in assembly language and higher-level languages like C, which are essential for developing sophisticated embedded systems.

One of the significant features of the 8XC251 family is its integrated peripherals, including timer/counters, serial communication interfaces, and interrupt systems. These peripherals enable developers to implement timing functions, data communication, and real-time processing, all of which are crucial in modern embedded applications. The 8XC251SB and 8XC251SQ models, for instance, come equipped with multiple I/O ports that allow for interfacing with other devices and systems, enhancing their functionality in various environments.

The memory architecture of the 8XC251 devices is noteworthy, featuring on-chip ROM, RAM, and EEPROM. The on-chip memory allows for fast access times, which is essential for executing programs efficiently. Moreover, the EEPROM serves as non-volatile memory, enabling the storage of configuration settings and important data that must be retained even when power is lost.

In terms of operating voltage, the 8XC251 devices are designed to operate in a wide range, typically between 4.0V and 6.0V. This flexibility makes them suitable for battery-powered applications, where energy efficiency is critical. The power management features, including reduced power modes, further enhance their suitability for portable devices.

Lastly, the 8XC251 series is supported by a wide range of development tools and resources, allowing engineers and developers to streamline the development process. This support, combined with the microcontrollers' robust features, makes the Intel 8XC251 family a reliable choice for various embedded applications, such as industrial automation, automotive systems, and consumer electronics.

Overall, the Intel 8XC251SB, 8XC251SQ, 8XC251SA, and 8XC251SP deliver high performance, versatility, and ease of use, making them a preferred choice for embedded system designers looking to develop efficient and effective solutions.