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Intel 8XC251SQ, 8XC251SA, 8XC251SP, 8XC251SB Programming Considerations for On-chip Code Memory

Models: Embedded Microcontroller 8XC251SP 8XC251SA 8XC251SQ 8XC251SB

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8XC251SA, SB, SP, SQ USER’S MANUAL

In some microcontroller applications, it is desirable that user program code be secure from unau- thorized access. The 8XC251Sx offers two types of protection for program code stored in the on- chip array.

•Program code in the on-chip code memory is encrypted when read out for verification if the encryption array is programmed.

•A three-level lock bit system restricts external access to the on-chip code memory.

14.1.1 Programming Considerations for On-chip Code Memory

It is recommended that user program code be located starting at address FF:0100H. Since the first instruction following device reset is fetched from FF:0000H, use a jump instruction to FF:0100H to begin execution of the user program. For information on address spaces, see Chapter 3.

The top eight bytes of the memory address space (FF:FFF8H–FF:FFFFH) are reserved for device configuration. Do not read or write user code at these locations. For EA# = 1, the reset routine obtains configuration information from a configuration array located these addresses. For EA# = 0, the reset routine obtains configuration information from a configuration array in exter- nal memory using these internal addresses. For a detailed discussion of device configuration, see Chapter 4.

ROM/OTPROM/EPROM devices have on-chipuser code memory at FF:0000–FF:1FFFH (8 Kbytes) or FF:0000H–FF:3FFFH (16 Kbytes). Addresses outside these ranges access external memory. With EA# = 1 and both on-chip and external code memory, you can place code at the highest addresses of the on-chip ROM/OTPROM/EPROM. When the highest on-chip address is exceeded during execution, code fetches automatically rollover from on-chip memory to external memory. See the notes on pipelining in section 3.2.2, “On-chip Code Memory (83C251SA, SB, SP, SQ/87C251SA, SB, SP, SQ).”

With EA# = 1 and only on-chip code memory, multi-byte instructions and instructions that result in call returns or prefetches should be located a few bytes below the maximum address to avoid inadvertently exceeding the top address. Use an EJMP instruction, five or more addresses below the top of memory, to continue execution in other areas of memory. See the note on pipelining in section 3.2.2, “On-chip Code Memory (83C251SA, SB, SP, SQ/87C251SA, SB, SP, SQ).”

CAUTION

Execution of user code located in the top few bytes of the on-chip user memory may cause prefetches from the next higher addresses, i.e. external memory. External memory fetches make use of port 0 and port 3 and may disrupt program execution if the program uses port 0 or port 3 for a different purpose.

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Intel 8XC251SQ, 8XC251SA, 8XC251SP, 8XC251SB, Embedded Microcontroller Programming Considerations for On-chip Code Memory
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Embedded Microcontroller, 8XC251SP, 8XC251SA, 8XC251SQ, 8XC251SB specifications

The Intel 8XC251 series of embedded microcontrollers is a family of versatile and powerful devices, designed to meet the demands of a wide range of applications. With models such as the 8XC251SB, 8XC251SQ, 8XC251SA, and 8XC251SP, this series offers unique features while maintaining a high level of performance and reliability.

At the heart of the 8XC251 microcontrollers is the 8051 architecture, which provides a 16-bit processor capable of executing complex instructions efficiently. This architecture not only allows for a rich instruction set but also facilitates programming in assembly language and higher-level languages like C, which are essential for developing sophisticated embedded systems.

One of the significant features of the 8XC251 family is its integrated peripherals, including timer/counters, serial communication interfaces, and interrupt systems. These peripherals enable developers to implement timing functions, data communication, and real-time processing, all of which are crucial in modern embedded applications. The 8XC251SB and 8XC251SQ models, for instance, come equipped with multiple I/O ports that allow for interfacing with other devices and systems, enhancing their functionality in various environments.

The memory architecture of the 8XC251 devices is noteworthy, featuring on-chip ROM, RAM, and EEPROM. The on-chip memory allows for fast access times, which is essential for executing programs efficiently. Moreover, the EEPROM serves as non-volatile memory, enabling the storage of configuration settings and important data that must be retained even when power is lost.

In terms of operating voltage, the 8XC251 devices are designed to operate in a wide range, typically between 4.0V and 6.0V. This flexibility makes them suitable for battery-powered applications, where energy efficiency is critical. The power management features, including reduced power modes, further enhance their suitability for portable devices.

Lastly, the 8XC251 series is supported by a wide range of development tools and resources, allowing engineers and developers to streamline the development process. This support, combined with the microcontrollers' robust features, makes the Intel 8XC251 family a reliable choice for various embedded applications, such as industrial automation, automotive systems, and consumer electronics.

Overall, the Intel 8XC251SB, 8XC251SQ, 8XC251SA, and 8XC251SP deliver high performance, versatility, and ease of use, making them a preferred choice for embedded system designers looking to develop efficient and effective solutions.