Intel Embedded Microcontroller, 8XC251SA, 8XC251SP Data Types, Register Notation, Address Notation

8XC251SA, SB, SP, SQ USER’S MANUAL

5.2.1Data Types

Table 5-1 lists the data types that are addressed by the instruction set. Words or dwords (double words) can be in stored memory starting at any byte address; alignment on two-byte or four-byte boundaries is not required. Words and dwords are stored in memory and the register file in big endien form.

Table 5-1. Data Types

Data Type	Number of Bits
Bit	1
Byte	8
Word	16
Dword (Double Word)	32

5.2.1.1Order of Byte Storage for Words and Double Words

MCS 251 microcontrollers store words (2 bytes) and double words (4 bytes) in memory and in the register file in big endien form. In memory storage, the most significant byte (MSB) of the word or double word is stored in the memory byte specified in the instruction; the remaining bytes are stored at higher addresses, with the least significant byte (LSB) at the highest address. Words and double words can be stored in memory starting at any byte address. In the register file, the MSB is stored in the lowest byte of the register specified in the instruction. For a description of the register file, see section 3.3, “8XC251SA, SB, SP, SQ Register File.” The code fragment in Figure 5-1 illustrates the storage of words and double words in big endien form.

5.2.2Register Notation

In register-addressing instructions, specific indices denote the registers that can be used in that instruction. For example, the instruction ADD A,Rn uses “Rn” to denote any one of R0, R1, ..., R7; i.e., the range of n is 0–7. The instruction ADD Rm,#data uses “Rm” to denote R0, R1, ..., R15; i.e., the range of m is 0–15. Table 5-2 summarizes the notation used for the register indices. When an instruction contains two registers of the same type (e.g., MOV Rmd,Rms) the first index “d” denotes “destination” and the second index “s” denotes “source.”

5.2.3Address Notation

In the MCS 251 architecture, memory addresses include a region number (00:, 01:, ..., FF:) (Fig- ure 3-4 on page 3-6). SFR addresses have a prefix “S:” (S:000H–S:1FFH). The distinction be- tween memory addresses and SFR addresses is necessary because memory locations 00:0000H– 00:01FFH and SFR locations S:000H–S:1FFH can both be directly addressed in an instruction.

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