PROGRAMMING

The MCS 251 architecture provides the MUL (multiply) and DIV (divide) instructions for un- signed 8-bit and 16-bit data (Table A-22 on page A-16). Signed multiply and divide are left for the user to manage through a conversion process. The following operations are implemented:

•eight-bit multiplication: 8 bits × 8 bits → 16 bits

•sixteen-bit multiplication: 16 bits × 16 bits → 32 bits

•eight-bit division: 8 bits ÷ 8 bits → 16 bits (8-bit quotient, 8-bit remainder)

•sixteen-bit division: 16 bits ÷ 16 bits → 32 bits (16-bit quotient, 16-bit remainder)

These instructions operate on pairs of byte registers (Rmd,Rms), word registers (WRjd,WRjs), or the accumulator and B register (A,B). For 8-bit register multiplies, the result is stored in the word register that contains the first operand register. For example, the product from an instruction MUL R3,R8 is stored in WR2. Similarly, for 16-bit multiplies, the result is stored in the dword register that contains the first operand register. For example, the product from the instruction MUL WR6,WR18 is stored in DR4.

For 8-bit divides, the operands are byte registers. The result is stored in the word register that con- tains the first operand register. The quotient is stored in the lower byte, and the remainder is stored in the higher byte. A 16-bit divide is similar. The first operand is a word register, and the result is stored in the double word register that contains that word register. If the second operand (the di- visor) is zero, the overflow flag (OV) is set and the other bits in PSW and PSW1 are meaningless.

5.3.3Logical Instructions

The MCS 251 architecture provides a set of instructions that perform logical operations. The ANL, ORL, and XRL (logical AND, logical OR, and logical exclusive OR) instructions operate on bytes and words that are accessed via several addressing modes (Table A-23 on page A-17). A byte register, word register, or the accumulator can be logically combined with a register, im- mediate data, or data that is addressed directly or indirectly. These instructions affect the Z and N flags.

In addition to the CLR (clear), CPL (complement), SWAP (swap), and four rotate instructions that operate on the accumulator, MCS 251 microcontrollers have three shift commands for byte and word registers:

•SLL (Shift Left Logical) shifts the register one bit left and replaces the LSB with 0

•SRL (Shift Right Logical) shifts the register one bit right and replaces the MSB with 0

•SRA (Shift Right Arithmetic) shifts the register one bit right; the MSB is unchanged

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Intel 8XC251SP, 8XC251SA, 8XC251SQ, 8XC251SB, Embedded Microcontroller manual Logical Instructions
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Embedded Microcontroller, 8XC251SP, 8XC251SA, 8XC251SQ, 8XC251SB specifications

The Intel 8XC251 series of embedded microcontrollers is a family of versatile and powerful devices, designed to meet the demands of a wide range of applications. With models such as the 8XC251SB, 8XC251SQ, 8XC251SA, and 8XC251SP, this series offers unique features while maintaining a high level of performance and reliability.

At the heart of the 8XC251 microcontrollers is the 8051 architecture, which provides a 16-bit processor capable of executing complex instructions efficiently. This architecture not only allows for a rich instruction set but also facilitates programming in assembly language and higher-level languages like C, which are essential for developing sophisticated embedded systems.

One of the significant features of the 8XC251 family is its integrated peripherals, including timer/counters, serial communication interfaces, and interrupt systems. These peripherals enable developers to implement timing functions, data communication, and real-time processing, all of which are crucial in modern embedded applications. The 8XC251SB and 8XC251SQ models, for instance, come equipped with multiple I/O ports that allow for interfacing with other devices and systems, enhancing their functionality in various environments.

The memory architecture of the 8XC251 devices is noteworthy, featuring on-chip ROM, RAM, and EEPROM. The on-chip memory allows for fast access times, which is essential for executing programs efficiently. Moreover, the EEPROM serves as non-volatile memory, enabling the storage of configuration settings and important data that must be retained even when power is lost.

In terms of operating voltage, the 8XC251 devices are designed to operate in a wide range, typically between 4.0V and 6.0V. This flexibility makes them suitable for battery-powered applications, where energy efficiency is critical. The power management features, including reduced power modes, further enhance their suitability for portable devices.

Lastly, the 8XC251 series is supported by a wide range of development tools and resources, allowing engineers and developers to streamline the development process. This support, combined with the microcontrollers' robust features, makes the Intel 8XC251 family a reliable choice for various embedded applications, such as industrial automation, automotive systems, and consumer electronics.

Overall, the Intel 8XC251SB, 8XC251SQ, 8XC251SA, and 8XC251SP deliver high performance, versatility, and ease of use, making them a preferred choice for embedded system designers looking to develop efficient and effective solutions.
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