Intel 8XC251SP Conditional Jumps, Compare-conditional Jump Instructions, Operand Relation Type

8XC251SA, SB, SP, SQ USER’S MANUAL

5.5.2Conditional Jumps

The MCS 251 architecture supports bit-conditional jumps, compare-conditional jumps, and jumps based on the value of the accumulator. A bit-conditional jump is based on the state of a bit. In a compare-conditional jump, the jump is based on a comparison of two operands. All condi- tional jumps are relative, and the target address (rel) must be in the current 256-byte block of code. The instruction set includes three kinds of bit-conditional jumps:

•JB (Jump on Bit): Jump if the bit is set.

•JNB (Jump on Not Bit): Jump if the bit is clear.

•JBC (Jump on Bit then Clear it): Jump if the bit is set; then clear it.

Section 5.4.1, “Bit Addressing,” describes the bit addressing used in these instructions.

Compare-conditional jumps test a condition resulting from a compare (CMP) instruction that is assumed to precede the jump instruction. The jump instruction examines the PSW and PSW1 reg- isters and interprets their flags as though they were set or cleared by a compare (CMP) instruction. Actually, the state of each flag is determined by the last instruction that could have affected that flag.

The condition flags are used to test one of the following six relations between the operands:

•equal (=), not equal (≠)

•greater than (>), less than (<)

•greater than or equal (≥), less than or equal (≤)

For each relation there are two instructions, one for signed operands and one for unsigned oper- ands (Table 5-9).

Table 5-9. Compare-conditional Jump Instructions

Operand					Relation
Type	=		≠	>		<	≥	≤
Unsigned		JE	JNE	JG		JL	JGE	JLE
Signed				JSG		JSL	JSGE	JSLE

5-14