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Chapter 5---Electronics
IIC_CLK - IIC clock line. Unidirectional clock line for control of synchronous data transfer over the IIC bus.
IIC_DATA - IIC data line.
+15 V (two inputs) - input power from LVPS for analog circuitry including the Phase Lock Loop (PLL) circuit.
+5.1 V - input power from the LVPS for digital circuitry
Raster Timing Generator PCB - Outputs
SOURCE_VALID - signal to the System Controller PCB, indicates a new or valid source. High = valid, stable source, low = change in input source.
ODD_FIELD - square wave to System Controller PCB, with 50% duty cycle that is high during the odd field of an interlaced signal and low for
280_CLK - square wave to System Controller PCB, with 50% duty cycle, synchronized to the horizontal sync at 280 times the frequency of the horizontal sync. This signal is used by the System Controller PCB to properly output shading and convergence data.
CLAMP - a
BLANKING - right, left, top, and bottom blanking signal to the Video Processor PCB.
Band 0 = 15 - 24 kHz
Band 1 = 24 - 28 kHz
Band 2 = 28 - 55 kHz
Band 3 = 56 - 90 kHz
/H_ENA - enables the horizontal deflection amplifier on the Horizontal Vertical Deflection PCB, Low = enabled deflection; high = disabled deflection.
H_FV2 - a DC voltage to the Horizontal Vertical Deflection PCB and System Controller PCB, proportional to horizontal frequency.
H_DRIVE - square wave to the Horizontal Vertical Deflection PCB, 50% duty cycle synchronized to the selected horizontal sync. This signal provides a sample of the horizontal sync to the horizontal amplifier on the Horizontal Vertical Deflection PCB.
HVPS_SYNC - synchronization pulse for High Voltage Power Supply, synchronized with the selected horizontal sync at the same, half, or one third the frequency.
Model 250 Service Manual |