The LSI53C810A typically fetches two Dwords (64 bits) and decodes the high order byte of the first Dword as a SCRIPTS instruction. If the instruction is a Block Move, the lower three bytes of the first Dword are stored and interpreted as the number of bytes to be moved. The second Dword is stored and interpreted as the 32-bit beginning address in main memory to which the move is directed.

For a SCSI send operation, the LSI53C810A waits until there is enough space in the DMA FIFO to transfer a programmable size block of data. For a SCSI receive operation, it waits until enough data is collected in the DMA FIFO for transfer to memory. At this point, the LSI53C810A requests use of the PCI bus again to transfer the data.

When the LSI53C810A is granted the PCI bus, it executes (as a bus master) a burst transfer (programmable size) of data, decrements the internally stored remaining byte count, increments the address pointer, and then releases the PCI bus. The LSI53C810A stays off the PCI bus until the FIFO can again hold (for a write) or has collected (for a read) enough data to repeat the process.

The process repeats until the internally stored byte count has reached zero. The LSI53C810A releases the PCI bus and performs another SCRIPTS instruction fetch cycle, using the incremented stored address maintained in the DMA SCRIPTS Pointer (DSP) register. Execution of SCRIPTS instructions continues until an error condition occurs or an interrupt SCRIPTS instruction is received. At this point, the LSI53C810A interrupts the host CPU and waits for further servicing by the host system. It can execute independent Block Move instructions specifying new byte counts and starting locations in main memory. In this manner, the LSI53C810A performs scatter/gather operations on data without requiring help from the host program, generating a host interrupt, or requiring an external DMA controller to be programmed. Figure 6.1 illustrates a SCRIPTS Initiator Write operation, which uses several Block Move instructions.

6-4

Instruction Set of the I/O Processor

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LSI 53C810A technical manual Instruction Set of the I/O Processor