7-10 Electrical Characteristics

7.3 AC Characteristics

The AC characteristics described in this section apply over the entire

range of operating conditions (referto Section 7.1, “DC Characteristics”).

Chip timings are based on simulation at worst case voltage,temperature,

and processing. Timings were developed with a load capacitance of

50 pF.Table 7.13 and Figure 7.6 provide clock timing data.

Figure 7.6 Clock Timing

Table 7.13 Clock Timing

Symbol Parameter Min Max Unit
t1Bus clock cycle time 30 DC ns
SCSI clock cycle time (SCLK)1
1. This parameter must be met to ensure SCSI timings are within specification.
25 60 ns
t2CLK LOW time2
2. Duty cycle not to exceed 60/40.
12 – ns
SCLK LOW time210 33 ns
t3CLK HIGH time212 – ns
SCLK HIGH time210 33 ns
t4CLK slew rate 1 – V/ns
SCLK slew rate 1 – V/ns
CLK, SCLK
t1
t3
t4
t2