finish the transfer at a later time using another bus ownership. If the chip is transferring multiple cache lines it continues to transfer until the next cache boundary is reached.

PCI Target Retry During a Write and Invalidate transfer, if the target device issues a retry (STOP with no TRDY, indicating that no data was transferred), the LSI53C810A relinquishes the bus and immediately tries to finish the transfer on another bus ownership. The chip issues another Write and Invalidate command on the next ownership, in accordance with the PCI specification.

PCI Target Disconnect During a Write and Invalidate transfer, if the target device issues a disconnect the LSI53C810A relinquishes the bus and immediately tries to finish the transfer on another bus ownership.

The chip does not issue another Write and Invalidate command on the next ownership.

3.2.3.3 Memory Read Line Command

This command is identical to the Memory Read command, except that it additionally indicates that the master intends to fetch a complete cache line. This command is intended for use with bulk sequential data transfers where the memory system and the requesting master might gain some performance advantage by reading up to a cache line boundary rather than a single memory cycle. The Read Line Mode function in the LSI53C810A takes advantage of the PCI 2.1 specification regarding issuing this command. The functionality of the Enable Read Line bit (bit 3 in DMA Mode (DMODE)) resembles the Write and Invalidate mode in terms of conditions that must be met before a Read Line command is issued. However, the Read Line option operates exactly like the previous LSI53C8XX chips when cache mode has been disabled by a CLSE bit reset or when certain conditions exist in the chip (explained below).

The Read Line mode is enabled by setting bit 3 in the DMA Mode (DMODE) register. If cache mode is disabled, Read Line commands are issued on every read data transfer, except opcode fetches.

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PCI Functional Description

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LSI 53C810A technical manual Memory Read Line Command