If the comparisons are false, the LSI53C810A fetches the next instruction from the address pointed to by the DMA SCRIPTS Pointer (DSP) register and the instruction pointer is not modified.

Interrupt Instruction

The LSI53C810A can do a true/false comparison of the ALU carry bit, or compare the phase and/or data as defined by the Phase Compare, Data Compare, and True/False bit fields.

If the comparisons are true, then the LSI53C810A generates an interrupt by asserting the IRQ/ signal.

The 32-bit address field stored in the DMA SCRIPTS Pointer Save (DSPS) register can contain a unique interrupt service vector. When servicing the interrupt, this unique status code allows the ISR to quickly identify the point at which the interrupt occurred.

The LSI53C810A halts and the DMA SCRIPTS Pointer (DSP) register must be written before starting any further operation.

Interrupt on-the-Fly Instruction

The LSI53C810A can do a true/false comparison of the ALU carry bit or compare the phase and/or data as defined by the Phase Compare, Data Compare, and True/False bit fields. If the comparisons are true, and the Interrupt-on-the-Fly bit is set (bit 2), the LSI53C810A asserts the Interrupt-on-the-Fly bit.

SCSIP[2:0] SCSI Phase[26:24]

This 3-bit field corresponds to the three SCSI bus phase signals which are compared with the phase lines latched when SREQ/ is asserted. Comparisons can be performed to determine the SCSI phase actually being driven on the SCSI bus. The following table describes the possible combinations and their corresponding SCSI phase. These bits are only valid when the LSI53C810A is operating in Initiator mode. Clear these bits when the LSI53C810A is operating in Target mode.

Transfer Control Instructions

6-31

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LSI 53C810A technical manual Interrupt Instruction, Interrupt on-the-Fly Instruction