CD

Compare Data

18

 

When this bit is set, the first byte received from the SCSI

 

data bus (contained in SCSI First Byte Received (SFBR)

 

register) is compared with the Data to be Compared Field

 

in the Transfer Control instruction. The Wait for Valid

 

 

Phase bit controls when this compare occurs. The Jump

 

if True/False bit determines the condition (true or false) to

 

branch on.

 

CP

Compare Phase

17

 

When the LSI53C810A is in Initiator mode, this bit

 

 

controls phase compare operations. When this bit is set,

 

the SCSI phase signals (latched by SREQ/) are

 

 

compared to the Phase Field in the Transfer Control

 

 

instruction. If they match, the comparison is true. The

 

 

Wait for Valid Phase bit controls when the compare

 

 

occurs. When the LSI53C810A is operating in Target

 

 

mode and this bit is set it tests for an active SCSI SATN/

 

signal.

 

WVP

Wait For Valid Phase

16

 

If the Wait for Valid Phase bit is set, the LSI53C810A

 

 

waits for a previously unserviced phase before comparing

 

the SCSI phase and data.

 

 

If the Wait for Valid Phase bit is cleared, the LSI53C810A

 

compares the SCSI phase and data immediately.

 

DCM

Data Compare Mask

[15:8]

 

The Data Compare Mask allows a SCRIPTS instruction

 

to test certain bits within a data byte. During the data

 

compare, if any mask bits that are set, the corresponding

 

bit in the SCSI First Byte Received (SFBR) data byte is

 

ignored. For instance, a mask of 0b01111111 and data

 

compare value of 0b1XXXXXXX allows the SCRIPTS

 

processor to determine whether or not the high order bit

 

is set while ignoring the remaining bits.

 

DCVData Compare Value[7:0]

This 8-bit field is the data to be compared against the SCSI First Byte Received (SFBR) register. These bits are used in conjunction with the Data Compare Mask Field to test for a particular data value.

6-34

Instruction Set of the I/O Processor

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LSI 53C810A technical manual Wvp, Dcm