LSI 53C810A technical manual IX-2Index

clock address incrementor bit 5-36clock byte counter bit 5-36

clock conversion factor bits 5-10CLSE bit 5-45

CM bit 5-31

CMP bit 5-48,5-51COM bit 5-47CON bit 5-7,5-28configured as I/O bit 5-31configured as memory bit 5-31connected bit 5-7,5-28CSF bit 5-64

CTEST0 register 5-29CTEST1 register 5-30CTEST2 register 5-30CTEST4 register 5-34CTEST5 register 5-36CTEST6 register 5-37cycle frame 4-7

D

DACK bit 5-31

data acknowledge status bit 5-31data path 2-8

data request status bit 5-31

data structure address register 5-26data transfer direction bit 5-30dataRD bit 5-56

dataWR bit DWR bit 5-56

DBC register 5-38DC characteristics 7-1DCMD register 5-39DCNTL register 5-45DDIR bit 5-30,5-37

destination I/O-memory enable bit 5-42determining the data transfer rate 2-13device select 4-7

DEVSEL/ 4-7DF[7:0] bits 5-37DFE bit 5-21DFIFO register 5-33DHP bit 5-6

DIEN register 5-44DIFFSENS SCSI signal 7-3DIOM bit 5-42

DIP bit 5-29

disable halt on parity error or ATN bit 5-6disable single initiator response bit 5-64DMA byte counter register 5-38

DMA command register 5-39DMA control register 5-45DMA core 2-2

DMA direction bit 5-37DMA FIFO 2-8

DMA FIFO bits 5-37DMA FIFO empty bit 5-21DMA FIFO register 5-33

DMA interrupt enable register 5-44DMA interrupt pending bit 5-29DMA mode register 5-41

DMA next address register 5-39DMA SCRIPTS pointer register 5-39DMA SCRIPTS pointer save register 5-40DMA status register 5-20

DMODE register 5-41

DNAD register 5-39

DRD bit 5-56

DREQ bit 5-31

DSA register 5-26

DSI bit 5-64

DSP register 5-39

DSPS register 5-40

DSTAT register 5-20

E

ease of use 1-4

enable parity checking bit 5-5enable read line bit 5-42enable read multiple bit 5-43

enable response to reselection bit 5-11enable response to selection bit 5-11encoded destination SCSI ID bits 5-15,5-19EPC bit 5-5

ERL bit 5-42EXC bit 5-6EXT bit 5-63

extend SREQ/SACK filtering bit 5-63extra clock cycle of data setup bit 5-6

F

FBL[2:0] bits 5-36fetch enable bit 5-57fetch opcode bursting 2-4FF[3:0] bits 5-24FFL[3:0] bits 5-30

FIFO byte control bits 5-36FIFO flags bits 5-24FMT[3:0] bits 5-30FRAME/ 4-7

function complete bit 5-48,5-51

G

GEN bit 5-50,5-54GEN[3:0] bits 5-58general purpose bits 5-16

general purpose pin control register 5-56general purpose register 5-16

general purpose timer expired bit 5-50,5-54general purpose timer period bits 5-58GNT/ 4-8

GPCNTL register 5-56GPIO enable bits 5-57GPIO[1:0] bits 5-16GPIO_EN[1:0] bits 5-57GPREG register 5-16grant 4-8

H

halt SCSI clock bit HSC bit 5-64

handshake-to-handshake timer expired bit 5-50,5-54handshake-to-handshake timer period bits 5-57header type (HT[7:0]) 3-17

high impedance mode bit 5-35HTH bit 5-50,5-54

IX-2Index