Index

Symbols

(AD[31:0]) 4-6(BARO[31:0]) 3-17(BARZ[31:0]) 3-17(CLS[7:0]) 3-16(FMT) 5-29(HT[7:0]) 3-17(IL[7:0]) 3-18(IP[7:0]) 3-18(LT[7:0]) 3-16(MG[7:0]) 3-19(ML[7:0]) 3-19

Numerics

encoded chip SCSI ID, bits 5-123.3/5 volt PCI interface 2-53-state 4-3

A

AAP bit 5-5

abort operation bit 5-26aborted bit 5-21,5-44ABRT bit 5-21,5-26,5-44AC characteristics 7-10ACK bit 5-18,5-20

ADB bit 5-6ADCK bit 5-36ADDER register 5-47

adder sum output register 5-47AESP bit 5-7

AIP bit 5-23ARB[1:0] bits 5-3arbitration

arbitration mode bits 5-3in progress bit 5-23mode bits 5-3

priority encoder test bit 5-60ART bit 5-60

assert even SCSI parity (force bad parity) bit 5-7assert SATN/ on parity error bit 5-5

assert SCSI ACK bit 5-18assert SCSI ATN/ bit 5-18assert SCSI BSY/ bit 5-18assert SCSI C_D/ bit 5-18assert SCSI data bus bit 5-6assert SCSI I_O/ bit 5-18assert SCSI MSG/ bit 5-18assert SCSI REQ/ signal bit 5-18

assert SCSI RST/ signal bit 5-7assert SCSI SEL/ bit 5-18ATN bit 5-18,5-20

B

base address register one (BARO[31:0]) 3-17

zero - I/O (BARZ[31:0]) 3-17BBCK bit 5-36

BDIS bit 5-34benefits summary 1-3BF bit 5-21,5-44bidirectional 4-3BL[1:0] bits 5-41

block move instructions 6-5BO[6:0] bits 5-33

BOF bit 5-43

BSY bit 5-18,5-20burst disable bit 5-34burst length bits 5-41

burst mode fetch enable bit 5-43bus command and byte enables 4-6bus fault bit 5-21,5-44

byte

empty in DMA FIFO (FMT) 5-29byte empty in DMA FIFO bits 5-30byte full in DMA FIFO bits 5-30byte offset counter bits 5-33

C

C_BE/[3:0] 4-6

C_D bit 5-18,5-20,5-25cache line size

(CLS[7:0]) 3-16

cache line size enable bit 5-45

cache mode, see PCI cache mode 3-3CCF[2:0] bits 5-10

chip revision level bits 5-32chip test five register 5-36chip test four register 5-34chip test one register 5-30chip test six register 5-37chip test two register 5-30chip test zero register 5-29chip type bits 5-55

CIO bit 5-31

clear SCSI FIFO bit 5-64CLK 4-5

clock 4-5

LSI53C810A PCI to SCSI I/O Processor

IX-1

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LSI 53C810A technical manual Symbols, Numerics