LSI 53C810A technical manual IX-6Index

SCRIPTS interrupt instruction received 5-21,5-44SCSI C_D/ signal 5-25

SCSI control enable 5-62

SCSI data high impedance 5-35SCSI disconnect unexpected 5-9SCSI FIFO test read 5-64SCSI FIFO test write 5-65SCSI gross error 5-48,5-52SCSI high impedance mode 5-62SCSI I_O/ signal 5-25

SCSI interrupt pending 5-28SCSI isolation 5-61

SCSI loopback mode 5-62SCSI low level mode 5-63SCSI MSG/ signal 5-25SCSI parity error 5-49

SCSI phase mismatch or SCSI ATN condition 5-48SCSI reset condition 5-49

SCSI RST/ received 5-53SCSI RST/ signal 5-23SCSI SDP/ signal 5-23SCSI selected as ID 5-60

SCSI synchronous offset maximum 5-61SCSI synchronous offset zero 5-60SCSI synchronous transfer period 5-12SCSI true end of process 5-31

SCSI valid 5-19

select with SATN/ on a start sequence 5-4selected 5-48,5-52

selection or reselection time-out 5-50,5-54selection response logic test 5-60selection time-out 5-58

semaphore 5-27

shadow register test mode 5-35SI_O/ status 5-20

SIDL full 5-22

signal process 5-27,5-31single step interrupt 5-21,5-44single-step mode 5-46SMSG/ status 5-20

SODL full 5-23SODR full 5-22software reset 5-27

source I/O-memory enable 5-42SREQ/ status 5-20

SSEL/ status 5-20

start DMA operation 5-46start SCSI transfer 5-8start sequence 5-4

synchronous clock conversion factor bits 5-9target mode 5-5

unexpected disconnect 5-49,5-52WATN 5-4

won arbitration 5-23reliability 1-5

REQ bit 5-18,5-20REQ/ 4-8request 4-8reselect

during reselection 2-11response to 2-11

reselected bit 5-48,5-52reset 4-5

reset SCSI offset bit 5-62RESPID0 register 5-59response ID zero register 5-59

revision level bits 5-32ROF bit 5-62

RRE bit 5-11

RSL bit 5-48,5-52RST bit 5-7,5-49,5-53RST/ 4-5

RST/ bit 5-23

S

SACK/ 4-9

SACK/ status bit 5-20SATN/ 4-9

SATN/ active bit 5-51SATN/ status bit 5-20SBCL register 5-20SBDL register 5-66SBSY/ 4-9

SBSY/ status bit 5-20SC_D/ status bit 5-20SCD/ 4-9

SCE bit 5-62SCF[2:0] bits 5-9SCID register 5-11SCLK 4-9

SCLK bit 5-61SCNTL0 register 5-2SCNTL1 register 5-6SCNTL2 register 5-9SCNTL3 register 5-9SCPTS bit 5-56SCRATCHA register 5-41

SCRIPTS

sample operation 6-3SCRIPTS bit 5-56

SCRIPTS instruction prefetching

no flush memory move instruction 6-38prefetch enable bit 5-45

prefetch flush bit 5-45

SCRIPTS interrupt instruction received bit 5-21,5-44SCRIPTS processor 2-2

performance 2-2

SCSI

termination 2-11

SCSI ATN condition - target mode 5-48SCSI bus control lines register 5-20SCSI bus data lines register 5-66SCSI bus interface 2-11to 2-12SCSI C_D/ signal 5-25

SCSI chip ID register 5-11SCSI clock 4-9

SCSI control 4-9

SCSI control enable bit 5-62SCSI control one register 5-6SCSI control three register 5-9SCSI control two register 5-9SCSI control zero register 5-2SCSI core 2-1

SCSI data high impedance bit 5-35SCSI destination ID register 5-15SCSI disconnect unexpected bit 5-9SCSI FIFO test read bit 5-64SCSI FIFO test write bit 5-65

SCSI first byte received register 5-17SCSI gross error bit 5-48,5-52SCSI high impedance mode bit 5-62

IX-6Index