Motorola TMS320C6711D warranty Only one asserted during any external data access

					SPRS292A − OCTOBER 2005 − REVISED NOVEMBER 2005
				Terminal Functions (Continued)
	PIN
SIGNAL	NO.	TYPE†	IPD/		DESCRIPTION
NAME	GDP/		IPU‡
	ZDP
		EMIF − CONTROL SIGNALS COMMON TO ALL TYPES OF MEMORY ¶ (CONTINUED)
HRDY	H19	O	IPD	Host ready (from DSP to host)
	V6	O/Z	IPU
CE3
				Memory space enables
CE2	W6	O/Z	IPU
				• Enabled by bits 28 through 31 of the word address
CE1	W18	O/Z	IPU
				• Only one asserted during any external data access
	V17	O/Z	IPU
CE0
	V5	O/Z	IPU
BE3				Byte-enable control
	Y4	O/Z	IPU
BE2				• Decoded from the two lowest bits of the internal address
	U19	O/Z	IPU	• Byte-write enables for most types of memory
BE1
				• Can be directly connected to SDRAM read and write mask signal (SDQM)
BE0	V20	O/Z	IPU
				EMIF − BUS ARBITRATION ¶
HOLDA	J18	O	IPU	Hold-request-acknowledge to the host
	J17	I	IPU	Hold request from the host
HOLD
BUSREQ	J19	O	IPU	Bus request output
			EMIF − ASYNCHRONOUS/SYNCHRONOUS MEMORY CONTROL ¶
ECLKIN	Y11	I	IPD	External EMIF input clock source
				EMIF output clock depends on the EKSRC bit (DEVCFG.[4]) and on EKEN bit (GBLCTL.[5])
				EKSRC = 0	– ECLKOUT is based on the internal SYSCLK3 signal
					from the clock generator (default).
ECLKOUT	Y10	O/Z	IPD	EKSRC = 1	– ECLKOUT is based on the the external EMIF input clock
					source pin (ECLKIN)
				EKEN = 0	– ECLKOUT held low
				EKEN = 1	– ECLKOUT enabled to clock (default)
ARE/SDCAS/	V11	O/Z	IPU	Asynchronous memory read enable/SDRAM column-address strobe/SBSRAM address strobe
SSADS
AOE/SDRAS/	W10	O/Z	IPU	Asynchronous memory output enable/SDRAM row-address strobe/SBSRAM output enable
SSOE
AWE/SDWE/	V12	O/Z	IPU	Asynchronous memory write enable/SDRAM write enable/SBSRAM write enable
SSWE
ARDY	Y5	I	IPU	Asynchronous memory ready input

†I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (PLL Filter)

‡ IPD = Internal pulldown, IPU = Internal pullup. [To oppose the supply rail on these IPD/IPU signal pins, use external pullup or pulldown resistors no greater than 4.4 kΩ and 2.0 kΩ, respectively.]

¶ To maintain signal integrity for the EMIF signals, serial termination resistors should be inserted into all EMIF output signal lines.

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