SPRS292A − OCTOBER 2005 − REVISED NOVEMBER 2005
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| Terminal Functions (Continued) | |
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SIGNAL | NO. | TYPE† | IPD/ |
| DESCRIPTION |
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NAME | GDP/ | IPU‡ |
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| ZDP |
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| MULTICHANNEL BUFFERED SERIAL PORT 1 (McBSP1) (CONTINUED) | |||
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| Receive data |
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| On this device, this pin does not have an internal pullup (IPU). For proper device operation, |
DR1 | M2 | I | IPU |
| the DR1 pin should either be driven externally at all times or be pulled up with a |
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| tor to a valid logic level. Because it is common for some ICs to |
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DX1 | L2 | O/Z | IPU |
| Transmit data |
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FSR1 | M3 | I/O/Z | IPD |
| Receive frame sync |
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FSX1 | L1 | I/O/Z | IPD |
| Transmit frame sync |
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| MULTICHANNEL BUFFERED SERIAL PORT 0 (McBSP0) | ||
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CLKS0 | K3 | I | IPD |
| External clock source (as opposed to internal) |
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CLKR0 | H3 | I/O/Z | IPD |
| Receive clock |
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CLKX0 | G3 | I/O/Z | IPD |
| Transmit clock |
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DR0 | J1 | I | IPU |
| Receive data |
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DX0 | H2 | O/Z | IPU |
| Transmit data |
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FSR0 | J3 | I/O/Z | IPD |
| Receive frame sync |
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FSX0 | H1 | I/O/Z | IPD |
| Transmit frame sync |
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| For this device, the CLKOUT2 pin is multiplexed with the GP[2] pin. |
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| Clock output at half of device speed (O/Z) [default] (SYSCLK2 internal signal |
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| from the clock generator) or this pin can be programmed as GP[2] (I/O/Z). |
CLKOUT2/ | Y12 | I/O/Z | IPD |
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GP[2] |
| When the CLKOUT2 pin is enabled, the CLK2EN bit in the EMIF global control | |||
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| register (GBLCTL) controls the CLKOUT2 pin (All devices). |
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| CLK2EN = 0: CLKOUT2 is disabled |
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| CLK2EN = 1: CLKOUT2 enabled to clock [default] |
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GP[7](EXT_INT7) | E3 |
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GP[6](EXT_INT6) | D2 |
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| interrupts |
I/O/Z | IPU |
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GP[5](EXT_INT5) | C1 |
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| • Polarity independently selected via the External Interrupt Polarity Register | ||
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GP[4](EXT_INT4) | C2 |
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| bits (EXTPOL.[3:0]), in addition to the GPIO registers. |
†I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (PLL Filter)
‡IPD = Internal pulldown, IPU = Internal pullup. [To oppose the supply rail on these IPD/IPU signal pins, use external pullup or pulldown resistors no greater than 4.4 kΩ and 2.0 kΩ, respectively.]
30 | POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 |
