Theory of Operation
2715 Spectrum Analyzer Service Manual 3-61
8/D 8/D 8/D
AD0−AD7
InternalParallel Bus
8/D Buffer
(Bidirectional)
8/D
14.7456MHz
RAM/ROM
(4Each)
Interrupt Timer
AudioTimer
SerialBus
Interface
Status
Buffers
Buffer
(Bidirectional)
Clock
Generator
CLK88
Address
Latches
(3)
Interrupt
Controller
MemorySelect
Demultiplexer
A8--A19
Demultiplexer
8/A
8/D
16/A
9/A
20/A 2/A
16/A
6/ATo Frequency
Counter
10
2
62
Enables
To50-Pin Connector Digital
PortDisplay Storage
Legend:N/A = N Address Lines
Buffers
Microprocessor
8
RAM/ROM
Enable
N/D= N Data Lines
Figure 3- 24: Microprocessor Block Diagram