
Theory of Operation
3-74 2715 Spectrum Analyzer Service Manual
GPIB, RS- 232, Real Time Clock,NVRAM, and Gated Measurement FunctionsThe Digital Options module provides both the RS--232 and GPIB interface and
gated sweep capability.The features are:
HGated measurement functionsto provide in service measurement capability
HA standard IEEE 488.1 GPIB interface
HTwo RS--232 interfaces which includes :
A full 7 wire interface (RXD,TXD,DTR,DSR,RTS,CTS,CD)
A simple 3 wire (RXD,TXD,DTR) interface
HA real time clock with batteryback up
HNVRAM for storing waveforms and instrumentsettings
In-service CATVmeasurements require the ability to look for very weaknoise or
distortion components. For example, the C/N measurement will commonly have a
noise floor 50 to 65 dB below the visual carrier(in a 300 kHz resolution band-
width), and the CSO measurement will have similar amplitudes but in a 30 kHz
resolution bandwidth. Unfortunately,the sidebands resulting from video modulation
of the carrier aregenerally much stronger that this.
To overcome this measurement difficulty, the analyzer ’sdata acquisition is shut off
except during quiet scan lines. Th ese quiet scan lines occur during vertical retrace.
The temporary absenceof video modulation during these lines means that sidebands
are not present (providedthat the resolution filter being used has a settling time
shorter than the horizontalline time). This function is performed by the acquisition
control facility on the Display Storageboard.
In practical applicationthe settling time of the resolution filter is not entirely
predictable. The abrupt edges that occurduring the horizontal sync pulse immedi-
ately preceding a given quiet line shock s the resolution filter into ringing even if it
is tuned some distance away from the visual carrier.To overcome this, the sharp
edges associated with the sync puls eare repl aced by soft edges having rise and fall
times of a few microseconds. The shock excitation of the filteris negligible even if
the filter is tuned as close as 500 kHz from the visual carrier.The IF Gate performs
this edge softening function, by blocking the IF pathduring the sync pulse time.
The Address Bufferingand Decoding section consists of three 74HCT541 bus
receivers (U24, U25, and U26) to receive 20 b its of address and 4 control signals
(BRD_L, BWR_L, BIO/W_L and BCLK), a GAL26V12 (U7) foraddress decoding
and a 74HCT245 bus transceiver (U1)to buffer the 8 bit data bus. Part of U10 is
also used to generate thebus wait signal BWAIT_L required for TTY write cycles.