Texas Instruments SM320F2812-HT Low-Power Mode Wakeup Timing, A0−A15, Xclkout = Sysclkout

SM320F2812-HT

SGUS062A –JUNE 2009 –REVISED APRIL 2010 www.ti.com

6.15 Low-Power Mode Wakeup Timing

Table 6-10is also the IDLE Mode Wake-Up Timing Requirements table.

Table 6-10. IDLE Mode Switching Characteristics(1)

	PARAMETER	TEST CONDITIONS				MIN	TYP	MAX	UNIT
tw(WAKE-INT)	Pulse duration, external wake-up	Without input qualifier			2 x tc(SCO)				Cycles
	signal	With input qualifier	1	× tc(SCO) + IQT(2)					Cycles
	Delay time, external wake signal
	to program execution resume(3)
	–Wake-up from Flash	Without input qualifier			8 × tc(SCO)				Cycles
	–Flash module in active state
	– Wake-up from Flash	With input qualifier	8	× t	c(SCO)	+ IQT(2)			Cycles
td(WAKE-IDLE)	–Flash module in active state
	–Wake-up from Flash	Without input qualifier			1050 × tc(SCO)				Cycles
	–Flash module in sleep state
	–Wake-up from Flash	With input qualifier	1050	× t	c(SCO)	+ IQT(2)			Cycles
	–Flash module in sleep state
	–Wake-up from SARAM	Without input qualifier			8 × tc(SCO)				Cycles
	–Wake-up from SARAM	With input qualifier	8	× t	c(SCO)	+ IQT(2)			Cycles

(1)Not production tested.

(2)Input Qualification Time (IQT) = [5 × QUALPRD × 2] × tc(SCO)

(3)This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. Execution of an ISR (triggered by the wake-up) signal involves additional latency.

td(WAKE−IDLE)

A0−A15

XCLKOUT (see Note A)

tw(WAKE−INT)

WAKE INT (see Note B)

A.XCLKOUT = SYSCLKOUT

B.WAKE INT can be any enabled interrupt, WDINT, XNMI, or XRS.

Figure 6-13. IDLE Entry and Exit Timing

100 Electrical SpecificationsCopyright © 2009–2010, Texas Instruments Incorporated

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