Texas Instruments SM320F2812-HT General-Purpose Input/Output Gpio Input Timing, Qualprd Sysclkout

SM320F2812-HT

SGUS062A –JUNE 2009 –REVISED APRIL 2010 www.ti.com

XCLKOUT

td(XCOH-GPO)

GPIO

tf(GPO)

tr(GPO)

Figure 6-21. General-Purpose Output Timing

6.18 General-Purpose Input/Output (GPIO) – Input Timing

See Note A

GPIO

Signal

1	1	0	0		0	0	0	0	0	1	0	0	0	1	1	1	1	1	1	1	1	1
				Sampling Window									QUALPRD

SYSCLKOUT

QUALPRD = 1 (2 x SYSCLKOUT cycles) x 5

Output From

Qualifier

NOTES: A. This glitch is ignored by the input qualifier. The QUALPRD bit field specifies the qualification sampling period. It can vary from 00 to 0xFF. Input qualification is not applicable when QUALPRD = 00. For any other value n, the qualification sampling period in 2n SYSCLKOUT cycles (i.e., at every 2n SYSCLKOUT cycle, the GPIO pin is sampled). Six consecutive samples must be of the same value for a given input to be recognized.

B.For the qualifier to detect the change, the input should be stable for 10 SYSCLKOUT cycles or greater. In other words, the inputs should be stable for (5 x QUALPRD x 2) SYSCLKOUT cycles. This would ensure six sampling windows for detection to occur. Since external signals are driven asynchronously, an 11-SYSCLKOUT-wide pulse ensures reliable recognition.

Figure 6-22. GPIO Input Qualifier – Example Diagram for QUALPRD = 1

Table 6-20. General-Purpose Input Timing Requirements(1)

						MIN	MAX	UNIT
tw(GPI)	Pulse duration, GPIO low/high	All GPIOs	With no qualifier		2 × tc(SCO)			cycles
			With qualifier	1 × t	c(SCO)	+ IQT(2)

(1)Not production tested.

(2)Input Qualification Time (IQT) = [5 × QUALPRD × 2] × tc(SCO)

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