Texas Instruments SM320F2812-HT specifications Xtiming Register Configuration Restrictions1

							SM320F2812-HT
www.ti.com					SGUS062A –JUNE 2009 –REVISED APRIL 2010
or
	Table 6-31. XTIMING Register Configuration Restrictions(1) (2)
XRDLEAD	XRDACTIVE	XRDTRAIL	XWRLEAD	XWRACTIVE		XWRTRAIL		X2TIMING
≥ 2	≥ 1	0	≥ 2	≥ 1		0		0, 1

(1)Not production tested.

(2)No hardware to detect illegal XTIMING configurations

Examples of valid and invalid timing when using Asynchronous XREADY:

Table 6-32. Asynchronous XREADY(1) (2)

	XRDLEAD	XRDACTIVE	XRDTRAIL	XWRLEAD	XWRACTIVE	XWRTRAIL	X2TIMING
Invalid	0	0	0	0	0	0	0, 1
Invalid	1	0	0	1	0	0	0, 1
Invalid	1	1	0	1	1	0	0
Valid	1	1	0	1	1	0	1
Valid	1	2	0	1	2	0	0, 1
Valid	2	1	0	2	1	0	0, 1

(1)Not production tested.

(2)No hardware to detect illegal XTIMING configurations

Unless otherwise specified, all XINTF timing is applicable for the clock configurations shown in Table 6-33.

Table 6-33. XINTF Clock Configurations

MODE	SYSCLKOUT	XTIMCLK	XCLKOUT
1		SYSCLKOUT	SYSCLKOUT
Example:	150 MHz	150 MHz	150 MHz
2		SYSCLKOUT	1/2 SYSCLKOUT
Example:	150 MHz	150 MHz	75 MHz
3		1/2 SYSCLKOUT	1/2 SYSCLKOUT
Example:	150 MHz	75 MHz	75 MHz
4		1/2 SYSCLKOUT	1/4 SYSCLKOUT
Example:	150 MHz	75 MHz	37.5 MHz

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