Bosch Appliances TTCAN user manual RTO , TM , L2 , TTMode3

Page 73

TTCAN

 

User’s Manual

 

Revision 1.6

 

 

 

 

 

 

 

 

 

 

 

Line

Ad

Register

 

Remark

M0

M1

S0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

77

24

IF1 Message Data B2

 

Time_Mark

0320

0320

03F0

 

 

 

 

 

 

 

 

 

 

 

 

78

0E

Trigger Memory Access

 

write trigger 7

 

8007

 

 

 

 

 

 

 

 

 

 

 

 

 

79

22

IF1 Message Data B1

 

Type & Msg & Cycle_Code

0100

4406

8000

 

 

 

 

 

 

 

 

 

 

 

 

80

24

IF1 Message Data B2

 

Time_Mark

03E6

0320

0540

 

 

 

 

 

 

 

 

 

 

 

 

81

0E

Trigger Memory Access

 

write trigger 8

 

8008

 

 

 

 

 

 

 

 

 

 

 

 

 

82

22

IF1 Message Data B1

 

Type & Msg & Cycle_Code

8000

0100

A000

 

 

 

 

 

 

 

 

 

 

 

 

83

24

IF1 Message Data B2

 

Time_Mark

0540

03E6

2200

 

 

 

 

 

 

 

 

 

 

 

 

84

0E

Trigger Memory Access

 

write trigger 9

 

8009

 

 

 

 

 

 

 

 

 

 

 

 

 

85

22

IF1 Message Data B1

 

Type & Msg & Cycle_Code

2100

8000

E000

 

 

 

 

 

 

 

 

 

 

 

 

86

24

IF1 Message Data B2

 

Time_Mark

2000

0540

FFFF

 

 

 

 

 

 

 

 

 

 

 

 

87

0E

Trigger Memory Access

 

write trigger 10

 

800A

 

 

 

 

 

 

 

 

 

 

 

 

 

88

22

IF1 Message Data B1

 

Type & Msg & Cycle_Code

A000

2100

E000

 

 

 

 

 

 

 

 

 

 

 

 

89

24

IF1 Message Data B2

 

Time_Mark

2200

2000

FFFF

 

 

 

 

 

 

 

 

 

 

 

 

90

0E

Trigger Memory Access

 

write trigger 11

 

800B

 

 

 

 

 

 

 

 

 

 

 

 

 

91

22

IF1 Message Data B1

 

Type & Msg & Cycle_Code

E000

A000

E000

 

 

 

 

 

 

 

 

 

 

 

 

92

24

IF1 Message Data B2

 

Time_Mark

FFFF

2200

FFFF

 

 

 

 

 

 

 

 

 

 

 

 

93

0E

Trigger Memory Access

 

write trigger 12

 

800C

 

 

 

 

 

 

 

 

 

 

 

 

 

94

22

IF1 Message Data B1

 

Type & Msg & Cycle_Code

 

E000

 

 

 

 

 

 

 

 

 

 

 

 

 

95

24

IF1 Message Data B2

 

Time_Mark (EndofList)

 

FFFF

 

 

 

 

 

 

 

 

 

 

 

96

0E

Trigger Memory Access

 

write trigger 13…32

800D…801F

 

 

 

 

 

 

 

 

 

 

 

 

97

66

TT Clock Control

 

ldSDL=2, CT-TMI, GT-SW

 

474C

 

 

 

 

 

 

 

 

 

 

 

 

 

98

28

TT Operation Mode

 

R_T_O, TM, L2, TTMode_3

008B

08CB

7F7B

 

 

 

 

 

 

 

 

 

 

 

 

99

00

CAN Control

 

start operating, enable interrupt

 

0002

 

 

 

 

 

 

 

 

 

 

 

 

In the Message RAM, the first Message Object is reserved for the Reference Message. The objects 2 to 16 are transmit objects, the objects 17 to 32 are receive objects.

 

 

M0

M1

S0

 

 

 

 

 

 

 

 

 

1

Reference Message, Id=0F0…0F7

 

 

 

 

 

about.fm

2

M0_Msg2, Id=302, Tx

M1_Msg2, Id=312, Tx

S0_Msg2, Id=322, Tx

 

 

 

 

3

M0_Msg3, Id=303, Tx

M1_Msg3, Id=313, Tx

S0_Msg3, Id=323, Tx

manual

 

 

 

 

4

not valid

M1_Msg4, Id=314, Tx

not valid

 

 

 

 

 

 

5

Tx in Merged_Arb_Win

Tx in Merged_Arb_Win

Tx in Merged_Arb_Win

 

 

 

 

 

 

6

Tx in Arb_Win2

Tx in Arb_Win2

Tx in Arb_Win2

 

 

 

 

 

 

7

Tx in Arb_Win1 or 3

Tx in Arb_Win1 or 3

Tx in Arb_Win1 or 3

 

 

 

 

 

 

8…16

not valid

not valid

not valid

 

 

 

 

 

 

17

M1_Msg2, Id=312, Rx

M0_Msg3, Id=303, Rx

M0_Msg2, Id=302, Rx

 

 

 

 

 

 

18

S0_Msg2, Id=322, Rx

S0_Msg3, Id=323, Rx

M1_Msg4, Id=314, Rx

 

 

 

 

 

 

19…31

Id=xxx, Rx-FIFO-Start

Id=xxx, Rx-FIFO-Start

Id=xxx, Rx-FIFO-Start

 

 

 

 

 

 

32

Id=xxx, Rx-FIFO-End

Id=xxx, Rx-FIFO-End

Id=xxx, Rx-FIFO-End

 

 

 

 

 

BOSCH

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11.11.02

Image 73
Contents Robert Bosch GmbH User’s ManualCopyright Notice and Proprietary Information Change Control Functional Overview 2.2. Block Diagram Operating ModesConventions Scope References Terms and Abbreviations Can Application Ttcan Schedule Initialisation Ttcan ConfigurationTtcan Message Handling List of FiguresChange History Change Control Current StatusConventions Helvetica boldTerm Meaning Functional Overview Ttcan CpuifcCan Message Transfer Operating Modes Software InitialisationTest Mode Disabled Automatic RetransmissionTest Register addresses 0x0B & 0x0A Ttcan =1 Loop Back combined with Silent Mode Loop Back ModeSoftware control of Pin Cantx No Message RAM ModeAddress Name Reset Value Ttcan Register Summary Hardware Reset DescriptionDAR CCEEIE SIEStatus Register addresses 0x03 No ErrorStatus Interrupts Error Counter addresses 0x05Bit Timing Register addresses 0x07 BRP Extension Register addresses 0x0D & 0x0C Direction = Write IFx Command Mask RegistersArb Direction = Read IFx Command Request RegistersControl ClrIntPndMessage Number BusyIFx Message Buffer Registers IFx Mask RegistersIFx Data a and Data B Registers IFx Message Control RegistersMessage Object in the Message Memory Msk28-0 ID28-0Xtd Dir26/77 11.11.02 Interrupt Register addresses 0x09 Message Handler RegistersNew Data Registers Transmission Request RegistersInterrupt Pending Registers Message Valid 1 Register 2 IF1 Data B1 and B2 Registers for Trigger Memory AccessTrigger Number Type TT Operation Mode Register addresses 0x29TimeMark At CycleCount mod MPr2-0Rdlc EecsTEW CCM TT Interrupt Enable Register addresses 0x31Bark AppWdLGTE CELGTW SWERTO TT Cycle Count Register addresses 0x3D & 0x3C TT Error Level Register addresses 0x3F & 0x3ETUR Numerator Configuration Low Register addresses 0x57 TUR Numerator Actual Registers addresses 0x5B & 0x5A TUR Denominator Configuration Register addresses 0x59TT StopWatch Register addresses 0x61 Qgtp QCSEcal EgtfDET TMCECS SWSTMG EPE40/77 11.11.02 Data Transfer Between IFx Registers and Message RAM Internal can Message HandlingStart Transmission of Messages in Event Driven can CommunicationReception of Data Frame Acceptance Filtering of Received MessagesReception of Remote Frame Storing Received Messages in Fifo BuffersConfiguration of the Module Receive / Transmit Priority1 Configuration of the Bit Timing Sync PropSeg PhaseSeg1 PhaseSeg2Bit Time and Bit Rate Canclk input Nominal can Bit TimeBRP Propagation Time SegmentPhase Buffer Segments and Synchronisation Synchronisation on late and early Edges Filtering of Short Dominant Spikes 1.5 Configuration of the can Protocol Controller Oscillator Tolerance RangeCalculation of the Bit Timing Parameters Example for Bit Timing at high Baudrate 2 Configuration of the Message Memory Example for Bit Timing at low Baudrate2.2 Configuration of a Single Receive Object for Data Frames 2.1 Configuration of a Transmit Object for Data Frames2.3 Configuration of a Fifo Buffer Handling of Interrupts Can CommunicationUpdating a Transmit Object Reading Received Messages Changing a Transmit ObjectRequesting New Data for a Receive Object Reading from a Fifo BufferCPU Handling of a Fifo Buffer Interrupt Driven Ttcan Timing Ttcan Configuration510 125000 32.5 100/12 529/17 TURMessage Scheduling Trigger Memory 63/77 11.11.02 Reference Message Message ObjectsPeriodic Transmit Message Time Slaves Event Driven Transmit MessagePotential Time Masters Message Transmission Ttcan Message Handling Message ReceptionPeriodic Messages Event Driven MessagesStopwatch Ttcan Gap ControlCycle Time and Global Time Synchronisation Previous RefMark Ttcan Interrupt and Error HandlingConfiguration Example Rdlc & TEW & CCM Register RemarkType & Msg & CycleCode RTO , TM , L2 , TTMode3 74/77 11.11.02 Interface GenericCustomer Interface Canclk Canwaitb Timing of the Wait output signalBusy = ‘1’ Busy = ‘0’ Interrupt TimingEOF