AT&T manual IPC-1600 Architecture

Models: IPC-1600

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IPC-1600 Architecture

The architecture of the IPC-1600 provides many useful and powerful multiuser capabilities under the UNIX system. Furthermore, single-user applications using the IPC-1600 for general-purpose I/O, as well as for industrial control, can be done under MS-DOS.

IPC-1600 features include the following:

One 80C186 16-bit microprocessor (12.5 MHz).

Industry Standard Architecture (ISA) bus connectors (any 16- or 32-bit slot can be used).

One host Interrupt ReQuest (IRQ) level can be shared per 16 ports or one IRQ level can be assigned for all IPC-1600s (maximum of 7 boards [112 ports]).

A 64-KB dual-ported Static Random Access Memory (SRAM) is used for data storage and buffering. This SRAM provides communications and control between the host processor and the IPC-1600 microprocessor. The host processor address range for this space is on 64KB boundaries and is switch selectable. This SRAM is “zero-wait-state” to the IPC-1600 microprocessor.

A 16KB RAM for local programs.

The use of a 16-bit data transfer on the Industry Standard Architecture (ISA) bus for maximum efficiency.

Chapter 6, “System Features,” provides more detailed information.

OVERVIEW 1-5

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AT&T manual IPC-1600 Architecture